Editor: Linley Gwennap In This Issue
Save the date! The inaugural Linley Tech Spring Conference will be held May 18-19 in San Jose. This two-day event will focus on chips, processors, and interconnects for data-center networking and security. Further information will be announced soon. If you missed last week's Linley Tech Carrier Ethernet Seminar, don't despair! You can download a free copy of the proceedings, featuring presentations from AppliedMicro, EZchip, TPACK, Wintegra, Xelerated, Fulcrum Microsystems, SafeNet, Ethernet Alliance, and The Linley Group. EZchip Samples Industry's First 100Gbps Merchant NPU At last week's Linley Tech seminar, Patrick Bisson, EZchip's VP of Technology Applications, presented details of the 100Gbps NP-4 network processor (NPU) for the first time in public. Like the shipping NP-3, the NP-4 integrates a programmable packet processor, traffic manager (TM), and Ethernet MACs. But whereas EZchip rates the NP-3 at 30Gbps, the NP-4 is designed for throughputs up to 100Gbps. The company will also offer a 50Gbps derivative called the NP-4L. The NP-4 takes advantage of high-speed serdes to cram many network interfaces into a manageable pin count. The chip includes up to 48xGbE ports using QSGMII, up to 10xGbE ports with XAUI or RXAUI, one 40GbE port with integrated MAC, and a pair of Interlaken interfaces to connect an external 100GbE MAC and a switch fabric. Another challenge is providing adequate external memory bandwidth for 100Gbps of processing and throughput. Like all EZchip NPUs, the NP-4 stores lookup tables in DRAM, in this case using four DDR3 channels. The integrated TM uses another four DDR3 channels to buffer packets. Specialty memories are used for only statistics/counters (RLDRAM2) and optional ACLs (TCAM). Although Xelerated has announced a 100Gbps NPU with a level of integration similar to that of the NP-4, this competing chip is not yet sampling. Indirect competition comes OEM's internal designs, including Alcatel-Lucent's FP2 and Juniper's Junos Trio. The 100Gbps FP2 has been shipping in systems since 2008 but is a two-chip set with separate packet-processor and TM devices. The new Junos Trio is a four-chip set rated at 240Gbps (120Gbps full-duplex). Thus, the NP-4 provides a higher level of integration than current captive NPU designs. Bragging rights aside, the NP-4 appears well timed to serve high-density GbE and 10GbE line cards, which will drive near-term demand. By the time 100GbE shipments become meaningful for chip vendors, EZchip will be pitching its NP-5 next-generation NPU for new designs. After all, this is the company that announced the NP-4 in May 2007, about two and a half years before seeing silicon. —Bob EZchip's NP-4 presentation is included in the proceedings from our Linley Tech Carrier Ethernet Design seminar available for free download. This week, Marvell entered the PON market with a new family of chips branded Avanta. The first product is a low-cost chip for SFUs (single-family units), followed by a full-featured chip for gateways and a high-performance chip for MDUs (multiple dwelling units). One unique feature of Avanta is its support for GPON and EPON on the same chip. Currently, OEMs must use daughter cards to develop a common EPON/GPON box. With Avanta, OEMs can place the PON controller on the main board and thus reduce development costs. Another differentiator is Avanta's integrated ARM-compatible Sheeva CPU that operates at up to 2.0GHz. The MDU chips use dual CPUs, while the SFU chips use a single CPU at 1.2GHz. The common architecture enables customers to port software among the different Avanta chips as well as other Marvell embedded processors. In addition, the dual-CPU Avanta can support multiple VoIP channels in software - eliminating a VoIP chip in the MDU. The third major differentiator is Avanta's level of integration. Avanta includes a six-port Ethernet switch along with four PHYs that support EEE (energy enhanced Ethernet) PHYs. Using an integrated packet engine, Avanta is rated at 2Gbps of throughput for IPv4/v6, NAT, and PPPoE. One (SFU) or two (MDU) PCI Express ports can connect to external Wi-Fi chips or other components. Marvell was able to reuse its proven Ethernet technologies to quickly attain this level of integration. After its Teknovus acquisition (see below), Broadcom is probably the only other company capable of similar integration. Despite these advantages, Marvell faces challenges in entering the PON market. The company has missed the EPON volume ramp in Japan, but its entry is timely for the bigger xPON volume ramp in China and other BRIC countries. Marvell must prove both GPON and EPON interoperability and help customers port existing software stacks to the Avanta architecture. Assuming the company executes well, the Avanta products should be quite attractive for new PON designs. —Jag Additional coverage of Marvell's Ethernet products appears in our recent report A Guide to Ethernet Switch and PHY Chips. As speculated by EE Times, Broadcom announced plans to acquire EPON vendor Teknovus. The acquisition gives Broadcom, which already offers GPON products, a proven EPON solution and instant leadership in 10G EPON technology. It should be noted, however, that the 10G EPON market has yet to emerge. With this acquisition, the company will also inherit as customers some of the leading EPON OEMs in China, Japan, and Korea. With both Broadcom and Marvell (see above) ramping up their PON efforts, current PON leader PMC-Sierra is the likely to be the biggest loser. Broadcom expects to pay $123 million for Teknovus. Founded in 2002, Teknovus had raised about $70 million and had a staff of about 140 employees. We estimate Teknovus, benefiting from the hot PON market, experienced around double digit growth in 2009, reaching $37 million in revenue. Even so, the startup lacked the resources to develop the next generation of highly integrated EPON products and thus would have struggled for revenue growth in 2011. Broadcom probably caught wind of rival Marvell's entry into the EPON market, forcing it to respond quickly. Marvell has been contacting OEMs and performing interoperability tests for months. At the same time, Teknovus was looking for an exit and had another interested suitor - Cavium. Cavium is already shipping processors into EPON gateways, which are a major source of Ethernet shipments for Broadcom. Without this acquisition, Broadcom was in danger of losing future Ethernet revenue as well as missing out on the EPON and potentially GPON volume ramp. Broadcom's acquisition is the right strategy but would have been better made a year earlier. To deliver a competitive EPON product, the company still has many tactical challenges: integration of Teknovus, consolidation of GPON and EPON product lines, developing common APIs to enable reuse, and product integration for gateways and MDUs. Acquiring Teknovus puts Broadcom on a path to defend its broadband-gateway business during the transition to xPON. —Jag Additional coverage of Teknovus appears in our report A Guide to Broadband Chips. Last week, Wintegra announced the WinPath3-SuperLite (WP3-SL), which extends the company's third-generation NPU family to very low prices. The WinPath3 derivative integrates a single 650MHz MIPS CPU and a reduced set of Ethernet interfaces, trimming cost and power dissipation. In terms of data-plane performance, control-plane performance, and number of interfaces, the WP3-SL represents a superset of WinPath2 devices, allowing it to replace the prior-generation chips for new designs. More significant from an industry perspective, WP3-SL high-volume pricing starts at less than $25, which will open up applications previously unavailable to programmable network processors. —Bob Complete coverage of Wintegra appears in our report A Guide to Network Processors. Last month, PLX Technology announced the NAS7800 family for networked attached storage (NAS) applications including gateways, routers, set-top boxes, and DVRs. With an external SLIC, the device may also be used to support VoIP. The processor's dual 800MHz ARM CPUs combine with the integrated accelerators to double the performance compared with the company's previous devices. PLX expects the read performance to exceed 65MB/s and the write performance to exceed than 50MB/s (transferring 512MB files). The NAS7800 products are scheduled to sample later this quarter. PLX has combined its Oxford acquisition with its I/O expertise to offer a highly integrated product for NAS applications. —Jag Additional coverage of NAS processors appears in our report A Guide to High-Speed Embedded Processors.
The market for licensed function blocks, known as intellectual property (IP), continues to grow rapidly. Rising transistor budgets and the trend toward system-on-a-chip design has made designing an entire complex ASIC or ASSP in house increasingly impractical. The most popular IP blocks are programmable processors such as CPUs and DSPs. As system designers place more emphasis on differentiation through sophisticated user interfaces, we have seen surging interest in graphics processor units (GPUs) as well. Several suppliers provide CPU IP, each offering unique advantages. Some CPUs are easily customized, others are superscalar, while still others support multiprocessor implementations. The realm of DSP IP is similarly complex. Driven by market requirements for high-definition audio and 3G/4G cellular, suppliers have developed several different approaches to handling these demanding signal-processing tasks. GPUs can accelerate 2D, 3D, and/or vector graphics using fixed or programmable engines. Video engines encode or decode digital video; some support a single codec (e.g. H.264) while others support multiple. For all types of IP, the available options range widely in performance, die area, and power. A Guide to CPU Cores and Processor IP sorts through these options, evaluating the high-performance designs available from the leading IP vendors. The report covers CPU, DSP, GPU and video-engine IP vendors, including ARM, Ceva, Imagination Technologies, MIPS, NXP, On2 (Hantro), Tensilica, VeriSilicon (ZSP), Virage Logic (ARC), Vivante, and several other suppliers. The report also provides background on how IP is used, an overview of common end markets such as consumer electronics and networking equipment, and market share and forecast data for the types of IP covered. Order by March 5 to receive this report at the introductory price. For more information on this report, visit our web site. New Article Featured in Electronic Design: Recent Posts from our Blog, Linley Chips In: To receive Linley Wire via e-mail, click here
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