High-Speed Interconnects
Held June 3, 2009 in San Jose, CA
Proceedings from the seminar are now available.
Proceedings Registration
On June 3rd we brought together industry leaders to discuss the latest products and technologies for system-level interconnects and recent developments at the physical layer for various protocols. With speeds ranging from 3Gbps to 40Gbps and 100Gbps, these interconnects are used at the board level, over the backplane, and between systems. The seminar delivered a wealth of information on interconnect technologies, developing standards, and technology trends.
Jag Bolaria, senior analyst at The Linley Group, began the program with
an overview of interconnect technologies, standards,
applications, silicon trends, and market forecast. The interconnects covered included PCIe, RapidIO, HyperTransport, Display Interfaces, SATA, SAS, Interlaken, and Ethernet. The remainder of the
day included talks and panel discussions exploring the latest products and technologies for wireless interconnects, optical interconnects, and 40G/100G Ethernet interconnects.
| We had an outstanding lineup of presenters, including: |
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Alessandro Barbieri, Product Line Manager, Ethernet Switching, Cisco
High-Speed Ethernet: A Switching Vendor Perspective |
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Keith Conroy, Architect, CTO Office, AppliedMicro
Optical Transport for 40/100G Systems
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Greg Shippen, System Architect, Freescale
Wireless Infrastructure Drives New Logical-Layer Innovation in System Interconnects and SoCs
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Gregory Kam, Director of Applications Engineering, Sarance Technologies
Interlaken Protocol: The Future of High-Speed Interconnects |
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Denny Scharf, Strategic Marketing Manager, Achronix
10G, 40G, & 100G Ethernet Processing with Speedster FPGAs |
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Marek Tlalka, VP of Marketing, Luxtera
Silicon Photonics-Enabled Low-Cost and High-Performance Optical Connectivity |
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Brent Przybus, Director, Platform Solutions, Xilinx
Xilinx V6 / S6 FPGA-Based Targeted Design Platforms Accelerate Innovation |
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Jan Meise, Director of Strategic Marketing, Finisar
The Seamless Use of Copper and Optics in High-Speed Interconnects
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Detailed program |
The seminar was intended for OEMs, ODMs, board developers, software developers, press, and the financial community. Attendance is free to qualified attendees who register by May 29.
Sponsored by AppliedMicro, Freescale, Sarance Technologies, the Ethernet Alliance, and the HyperTransport Consortium.
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