Carrier Conference 2013
Conference Proceedings Available Now
Held on June 12 - 13, 2013

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Agenda for Day One: Jun 12, 2013
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9:00am-10:00amKeynote

Carrier-Equipment Design Trends
Bob Wheeler, Principal Analyst and Jag Bolaria, Principal Analyst, The Linley Group

The Linley Group analysts will present an overview of market, technology, equipment-design, and silicon trends for designers of carrier equipment. This talk will provide context for the remainder of the conference as well as providing unique insights on communications-semiconductor trends.

10:00am-10:20amBreak Sponsored by Freescale
10:20am-12:00pmSession 1: Multicore Processors

This session, moderated by Linley Gwennap, discusses multicore-processor applications in service-provider networks.

Intelligent Multicore Processors for Next-Generation Carrier Networks

The growing requirements for higher bandwidth, more intelligent security and virtualization in carrier-class networks are driving the need for new innovations and a new class of access, edge, aggregation and core networking equipment. Broadcom will discuss innovative technologies in advanced multicore processors that are highly optimized to deliver the stringent performance and power profile required in every node of the network. The XLP II family of intelligent multicore processors integrate high performance CPU cores, best-in-class hardware accelerators and an ultra-efficient interconnect fabric, enabling OEMs and carriers to seamlessly scale their designs with a common software platform.

Virtualized, Secure Home Gateway: Multicore SOCs Raising the Bar Again
Venkat Sundaresan, Director, Product Management & Marketing, Cavium

Services for the Home are the predominant revenue source for carriers. The need to constantly reenergize and control the Quality of Experience (QOE) in the home drives innovation throughout carriers' networks. Rich and differentiated services are filling fat pipes to the home. But is the Home ready and secure enough to embrace these services? In this session, we will explore how Home Gateways powered by Cavium's multicore SOCs enable carriers to offer personalized and secure QOE and differentiated services to monetize their investments.

L4-L7 Virtual Network Functions - Methods to Achieve Multi-10G Performance
Srinivasa Addepalli, Fellow and Chief Software Architect, Freescale

Exploding year-over-year traffic growth, coupled with many L4-7 network functions, require scalable service provider networks. Multicore processors, with their built-in acceleration capabilities, are ideal for L4-7 network processing. The agility and elastic features of scalable networks require bringing up various L4-7 network functions dynamically, at different times, based on traffic characteristics. This presentation will address how cloud computing, virtualization and software defined network (SDN) technologies help to elastically adjust network-function bandwidth in service provider networks and how Multicore processors can play a role in achieving this.

There will be Q&A and a panel discussion featuring above speakers.

12:00pm-1:15pmLunch Sponsored by Cavium
1:15pm-2:45pmSession 2: Wireless Architectures

This session, moderated by Bob Wheeler, focuses on architectural innovations in base stations, Cloud RAN, and wireless backhaul.

Software Defined Access Framework and Modem Processing Unit
Gilad Garon, CEO, ASOCS

Heterogeneous Networks will require a myriad of wireless and cellular technologies deployed in numerousform factors (from nanocells to cloud RAN). All cells will need to co-exist as part of one efficient, software defined approach. Software Defined Access (SDA)warrants abstraction, scalability and virtualization of allwireless-access resourcesavailable to the cellularnetwork provider.In this talk, ASOCS will present its Modem Processing Unit along with its proposal for an SDA framework.

Cloud and Wireless Converge with 40Gbps RapidIO Interconnect
Trevor Hiatt, Senior Product Manager, IDT

RapidIO interconnect is used in 100% of 4G base station deployments.In this presentation, we show how using the RapidIO interconnect inside the base station at 20 40 Gbps and also extending the base station with collocated micro servers using RapidIO delivers a scalable, small footprint, low power, high reliability solution.A comparison on how this is most efficiently done with RapidIO versus using Ethernet or Inifiniband is provided, as both are common in data centers but not applicable to the Micro Server colocation.Both x86 and ARM based processor solutions are shown.

Facing The Challenges of 4G Mobile Backhaul
Liviu Pinchas, Director of Product Marketing, PMC

While the world is embracing a new 4G/LTE era, mobile backhaul technology, even with its decades of migration and maturation, is facing some serious challenges that are big enough to initiate a revolution. This talk will review the changes and the challenges of LTE and LTE-Advanced backhaul compared to existing deployments, including the considerations for both macrocells and small cells. It also proposes some solutions to address such challenges.

There will be Q&A following each talk.

2:45pm-3:05pmBreak Sponsored by Freescale
3:05pm-4:35pmSession 3: High-Performance Data Planes

Moderated by Jag Bolaria, this session looks at the technology challenges and solutions for data-plane designs at bandwidths of 100Gbps to 1Tbps.

Ethernet Packet Processing at 100G and Beyond
Nupur Shah, Director of Applications, Tabula

This presentation covers the challenges faced by designers of 100G systems. It presents how Tabula's ABAX2 3D programmable devices (3PLD) provide a flexible, high-performance, cost-effective solution to these challenges. ABAX2 devices are based on the Spacetime 3D architecture that delivers unmatched memory throughput and capacity in a 2GHz programmable fabric. This presentation will also cover how Spacetime many-ported memory accesses enable unequaled on-chip memory bandwidth which, combined with hard DDR3 and 100G Ethernet MAC hard blocks, provide all the necessary elements to design nimble platforms for 100G systems and beyond.

Evolving Toward 1Tbps Line Cards
Michael J Miller, VP of Technology Innovation and System Applications, MoSys

As designers develop 400Gbps line cards and consider 1Tbps designs, serial interfaces will play dominant roles. At 400G, the traditional packet processing models are broken. High-performance-serial networking memories, gearboxes, and nx25G retimers will emerge to address 1Tbps ecosystem requirements. Pin I/O efficiency, reach and functionality are critical to deliver performance and manage interconnect, package and power limitations. This presentation will explore line-card architecture from a serial-interface devices (datapath & look-aside) perspective and the ramifications as they evolve towards 1Tbps.

2.5D Networking SRAM: When Faster is Cheaper
David Chapman, VP of Marketing & Applications Engineering, GSI Technology

The semiconductor memory market: 20 years of density focus, 20 years of bandwidth focus. Now what? Networking Memory has taken the lead in driving Transaction Rate and putting the Random back in RAMs. 2.5D technology is emerging as the simple, low power, high performance route to the price and performance targets we will face in the near future. In this talk, GSI will show how Fast SRAM is poised to address the requirements of high performance networking.

There will be Q&A and a panel discussion featuring above speakers.

4:35pm-6:05pmReception and Exhibits Sponsored by Applied Micro Circuits

 

Premier Sponsor

AppliedMicro

Cavium Networks

Platinum Sponsor

Freescale

Gold Sponsor

Netronome

EZchip

MoSys

Broadcom

Xilinx

LSI

ASOCS

GSI Technology

Silver Sponsor

IDT

Industry Sponsor

Ethernet Alliance