Linley Processor Conference 2016
Focusing on embedded processors for communications, automotive, and IoT
September 27 - 28, 2016
Hyatt Regency, Santa Clara, CA
August 22, 2016
Akoustis Challenges Broadcom FBAR (MCR)
A startup company is using a new single-crystal manufacturing process to build RF filters for the LTE high band. It claims these filters will surpass the industry leader’s performance.
Comms Semis Look Beyond M&A (NWR)
Consolidation has left a stronger field of IC vendors in networking and communications. The leaders will benefit from an improving market in 2016.
EEMBC Upgrades Auto Benchmarks (MPR)
The leading provider of embedded-processor benchmarks has added multithreading, larger data sets, and other features to its popular AutoBench suite for automotive and industrial processors.
August 15, 2016
Chelsio’s Terminator Takes on 100GbE (NWR)
Chelsio Communications’ new T6 controller chip handles new 25/50/100G Ethernet speeds while also adding encryption-offload hardware. In storage targets, it faces QLogic’s “Big Bear,” which will soon be a Cavium offering.
FD-SOI Offers Alternative to FinFET (MPR)
A new version of SOI technology from GlobalFoundries provides an alternative to the expensive wafers and difficult design rules of advanced FinFET processes.
Snapdragon 820 Adds 1 (MCR)
Qualcomm’s new Snapdragon 821 processor, debuting in the Asus ZenFone 3 Deluxe, offers a modest speed boost but still delivers the best performance of any mobile device.
August 8, 2016
Barefoot’s Tofino Gives P4 a Test Spin (NWR)
Programmable-data-plane startup Barefoot Networks has disclosed more details of its Tofino 6.5Tbps switch chip, which customers can program using the open P4 language.
VeriSilicon VIP8000 Accelerates CNNs (MPR)
A licensable core for native OpenCL vision processing that is based on Vivante GPU technology, the VIP8000 targets automotive and consumer products.
U.S. Government Acts on 5G (NWR/MCR)
The FCC has allocated 11GHz of millimeter-wave spectrum for 5G in the U.S., and Verizon has defined its own pre-5G radio with plans for broadband deployment next year.
August 1, 2016
SiFive Offers RISC-V Platforms (MPR)
A startup founded by the creators of the RISC-V instruction set aims to reduce the cost of ASIC development by designing and selling custom chips based on open-source CPU cores.
Ceva X2 Controls Multiple PHYs (MPR/MCR)
Ceva’s new X2 DSP performs physical-layer (PHY) control in complex wireless modems such as LTE-Advanced, which requires control of multiple communications channels.
Fusion G3 Beefs Up Floating Point (MPR/MCR)
Cadence has developed the Fusion G3 DSP to target mobile and consumer applications, offering up to four times the performance of its Fusion F1.
RapidIO’s 25xN Follows Serdes Trend (NWR)
The release of the 100Gbps RapidIO 25xN specification represents a shift toward broader use of 25Gbps lanes over short distances, matching that speed’s popularity in networking.
July 25, 2016
Polaris Revitalizes AMD GPUs (MPR)
AMD’s 14nm Polaris architecture combines intelligent rasterization, quality of service, and novel circuit designs to nearly double performance per watt in the new Radeon RX 480.
Auto-to-Auto Comms Still in First Gear (NWR)
Even as deployments of vehicle-to-vehicle (V2V) communications begin, the 802.11p Wi-Fi standard is facing a new challenge from the LTE-based Cellular V2X.
SkyOne Ultra Simplifies LTE Design (MCR)
Skyworks latest RF front-end modules integrate a complete transmit and receive path. They appear in the high-end Huawei P9 smartphone and could move to lower-cost phones as well.
Editorial: Intel Extends Server Control (MPR)
Initiatives such as XPoint memory and RSA give Intel more control of the server platform even to the rack level, improving its profits but hobbling its customers.
Guest Commentary: Be a HW and SW Engineer (MPR)
As the slowdown in Moore’s Law constrains hardware performance, software and hardware engineers must better understand each other’s disciplines to optimize performance.
ARM Hatching 4K Video Egil (MPR/MCR)
ARM is developing a new video core, code-named Egil, that includes enhanced HEVC (H.265) support as well as the ability to encode and decode Google’s VP9 format.
July 18, 2016
Decawave Steers Impulse UWB to IoT (NWR)
Impulse-based ultrawideband radio, once an afterthought to the multiband version of the 802.15.4 WPAN standard, may find applications beyond real-time location services (RTLS). Decawave is a pioneering vendor.
Andes N650 Targets Low-Power IoT (MPR)
Andes has developed a low-power area-efficient CPU core, the 32-bit N650, that further extends the low end of its lineup to target IoT clients with very low power requirements.
Bosch Shrinks Nine-Axis Sensor (MCR)
Bosch has delivered one of the smallest nine-axis sensors to date, purpose built for wearables. It even includes a state machine that can timestamp and buffer sensor data.
July 11, 2016
Skyworks Extends Antenna Tuners (MCR)
The new SKY1925x family of switches improves both on-resistance and off-capacitance compared with the previous generation, providing antenna-tuning options across all LTE bands.
Xeon Phi 7200 Boots Up for HPC (MPR)
The initial Knights Landing products are now in production, delivering 3Tflop/s of double-precision performance with up to four times the power efficiency of Xeon E5.
In Memoriam: Michael Slater, Microprocessor Guru (MPR)
Michael Slater, founder of this newsletter as well as a friend and mentor to many of our staff, has passed away at the age of 60.
Editorial: Decoding Cavium’s QLogic (NWR)
Cavium is bringing a chip-vendor mentality to its turnaround plans for QLogic. Increased profitability is almost inevitable, but hitting growth targets will be a challenge.
Qualcomm’s GigaDSL Uses FDD (NWR)
Qualcomm has introduced new products from its 2015 acquisition of DSL specialist Ikanos. The QCO5700 for multiple-dwelling units and QCM5720 for customer premises equipment implement a frequency-division-duplex derivative of G.fast.
July 4, 2016
ConnectX-5 Targets HPC Co-Design (NWR)
The new Mellanox InfiniBand adapter is optimized for HPC co-design, which involves development of clustered multicore hardware in close association with simulated HPC applications known as mini-apps.
Synopsys Improves Vision With DSP (MPR)
The new DesignWare EV6x embedded-vision cores complement the ARC CPU with a 512-bit vector DSP and an optional convolutional-neural-network (CNN) accelerator.
Broadwell Accelerates the DPDK (MPR/NWR)
Intel Xeon processors are improving their networking performance through better hardware and better software—in particular, the Data Plane Development Kit (DPDK). Other vendors are following suit by adapting the DPDK to their processors.
June 27, 2016
IBM TrueNorth Tackles Deep Learning (MPR)
IBM’s neuromorphic processor tremendously improves power efficiency for certain machine-learning problems by eschewing the traditional memory model and relying on fixed-function computation.
Marvell Boosts Enterprise Ethernet (NWR)
Marvell's newest Prestera DX switches are changing a staid enterprise Ethernet market. The new Aldrin and AlleyCat 3X address aggregation and access using 10GbE and 2.5GbE port speeds.
Editorial: Learning Chips Hit the Market (MPR)
Google and IBM have already deployed custom chips optimized for deep learning, and several startups are also taking this approach, creating a new wave of microarchitecture design.
Qualcomm Wear 1100 Expands Lineup (MCR)
Targeting location trackers, geofencing, and similar applications, the Snapdragon Wear 1100 combines a simple application CPU, LTE baseband, and GPS baseband in a single chip.
GPUs Stream Into Data-Center Xeons (MPR)
Intel’s new Xeon E3-1500v5 server processors accelerate video and graphics workloads, pairing four Skylake CPUs with a powerful GPU and a co-packaged eDRAM cache.
June 20, 2016
14nm Broadwell-EX Boosts Brickland (MPR)
The third socket-compatible processor in Intel’s Xeon E7 platform known as Brickland, Broadwell-EX boosts performance and power efficiency by up to 30% and doubles memory capacity.
High-End Mali Takes Bifrost Bridge (MPR/MCR)
ARM’s newest GPU architecture addresses the requirements of high-performance graphics and enables cache-coherent CPU/GPU operation for general-purpose-GPU (GPGPU) computing.
Broadcom Grabs Magnacom for WAM (NWR/MCR)
Broadcom has quietly acquired Israel-based Magnacom to gain access to a patented modulation scheme that builds on quadrature amplitude modulation (QAM) for various applications.
Marvell IAP220 Targets Smart Home (MPR)
The new IAP220 combines dual Cortex-A7 CPUs with a low-power sensor hub, making it well suited to Android-based IoT devices. It can also serve in smartwatches.
Sonics Ice-G1 Simplifies the PMU (MPR)
Sonics’ new power-management IP replaces the traditional microcontroller with a set of state machines that provide much faster and more-localized control, reducing energy consumption.
June 13, 2016
Microsemi Expands GbE Switches (NWR)
Microsemi’s new Ocelot VSC75xx Ethernet switch chips target unmanaged and Layer 2 IoT applications with up to 10xGbE ports.
Leia 3D Aims to Change User Interface (MCR)
Startup Leia offers a new display technology that delivers a 3D effect across a broad range of viewing conditions, providing HD-quality 3D images at an affordable price.
Mellanox Marries ConnectX to Tile-Mx (MPR/NWR)
The new Mellanox BlueField SoCs integrate the company’s ConnectX Ethernet adapter design with ARM Cortex-A72 CPUs and the Tilera multicore technology acquired with EZchip.
June 6, 2016
Cortex-A73 Improves Mobile Efficiency (MPR/MCR)
The new Cortex-A73 focuses on power and sustainable performance instead of benchmark scores, reducing power by 20% and die area by 25% compared with its predecessor
Cavium Beefs Up ThunderX2 CPU (MPR)
After falling short of its promises regarding ThunderX, Cavium is doubling down on performance for its next-generation ThunderX2, which it expects to sample this year.
Startup Enters 50Gbps PHY Market (NWR)
Startup Etopus Technology has introduced a family of PHY devices that scale from 50Gbps to 400Gbps using the PAM4 encoding that the IEEE specifies for 50Gbps lanes.
CCIX: Coherent Interconnect for All (MPR)
The new CCIX Consortium is developing an open standard for connecting processors with coherent GPUs, FPGAs, NICs, and other accelerators, particularly in the data center and for HPC.
May 30, 2016
Mali-G71 Enables Coherent Computing (MPR/MCR)
ARM’s Mali-G71 enables full hardware cache-coherent operation for tightly coupled CPU/GPU workloads as well as TrustZone support for content protection.
Xilinx First to Sample 16nm FPGAs (NWR)
Xilinx is sampling six members of the 16nm UltraScale+ Virtex, Kintex, and Zynq MPSoC families, offering three separate FPGA/SoC generations from TSMC.
Ncore Makes FlexNoC Coherent (MPR)
The new Ncore NoC intellectual property from Arteris enables easy creation of fully heterogeneous cache-coherent SoCs.
Nvidia Brings Pascal to the Masses (MPR)
Nvidia has launched the GTX 1080, its first consumer GPU based on the Pascal graphics architecture.
Cypress Adds WICED to IoT Lineup (MPR)
To expand its IoT efforts beyond microcontrollers, Cypress has acquired Broadcom’s line of integrated Wi-Fi, Bluetooth, and ZigBee processors.