» Linley Newsletter Archive | Subscribe to Linley Newsletter

Linley Newsletter   Analysis of microprocessor and semiconductor developments

Our newsletter is free. To access entire articles please subscribe to Microprocessor Report.

SiFive Raises RISC-V Performance
At the Linley Fall Processor Conference, SiFive revealed its 7 Series cores. The new CPU is its most complex yet, moving into the same class as Arm’s “little” Cortex-A family.
Wave Exposes Broad Roadmap
Wave Computing is offering evaluation versions of its initial AI-acceleration systems while developing a second-generation ASIC, new MIPS cores, and its first licensable AI accelerators.
AIware3 Adds Rings to Neural Engine
AImotive’s third-generation licensable engine for autonomous-vehicle neural networks employs a new configurable ring structure that can connect multiple compute units to boost performance.
Cadence HiFi 5 Is a Smart Listener
The new licensable DSP handles speech recognition in digital assistants and other devices with voice interfaces. Relative to HiFi 4, it doubles audio-DSP performance and quadruples inference-engine performance.
Flex Logix Spins Neural Accelerator
Known for its embedded-FPGA IP, the startup is developing the NMax inference engine, a licensable core that scales from 512GMAC/s to 74TMAC/s or more.
LS1028A Targets Cars and Factories
NXP’s Layerscape LS1028A adds IEEE 802.1 Time-Sensitive Networking (TSN) and a graphics unit to its Ethernet controllers for mission-critical industrial and automotive applications.
PowerVR Halves GPU-Memory Needs
Imagination’s new PVRIC4 compression guarantees bandwidth savings of at least 50%, enabling designers to optimize their memory subsystem.
Eta Compute MCU Puts AI in IoT
The startup’s new Tensai chip combines an MCU with a DSP for machine learning. Eta completes its solution with optimized neural-network software for machine learning.
Tachyum Tries for Hyperscale Servers
The startup is developing a 64-core server processor, targeting tapeout late next year. The 7nm design implements a VLIW instruction set with custom vector and matrix instructions and a custom fabric.
Arm Frees FPGAs to Use Cortex-M
Arm is enabling free use of certain Cortex-M CPUs in Xilinx FPGAs, even for volume production. The new DesignStart FPGA program offers Cortex-M1 and Cortex-M3.
IBM Power9 Scales Up in Servers
IBM’s Power9 processor for scale-up servers, now available on the merchant market, employs external memory buffers to offer leading bandwidth and capacity, plus up to 16-socket configurations.
Intel 9th Generation Adds Little
Intel’s newest processors for gamers and content creators, Basin Falls and Coffee Lake-S Refresh, jump to eight cores in the Core i9-9900K but offer few other upgrades over the previous generation.
Cadence Mutates Its DNA to Boost AI
Cadence’s new DNA 100 IP core integrates a sparse-compute engine that supports applications ranging from low-power IoT devices to high-performance video surveillance and autonomous vehicles.
Titan IC Floats 100Gbps Reg-Ex Engine
The company’s RXP core delivers leading regular-expression-search throughput for SoC designs and FPGAs. The primary application is in network-security appliances such as intrusion-detection systems and next-generation firewalls.
Turing T4 Targets AI Inference
Nvidia’s new Turing architecture boosts AI inferencing performance by adding integer capability to its tensor cores. The Tesla T4 accelerator brings Turing to data centers as a 70W PCIe card.
  Linley Newsletter Archive | Subscribe to Linley Newsletter

Events

Linley Fall Processor Conference 2018
Covers processors and IP cores used in embedded, communications, automotive, IoT, and server designs.
October 31 - November 1, 2018
Hyatt Regency, Santa Clara, CA
More Events »

Newsletter

Linley Newsletter
Analysis of new developments in microprocessors and other semiconductor products
Subscribe to our Newsletter »