Linley on Mobile
Resonant Meshes Topple Clock TreesFebruary 20, 2012
Author: Linley Gwennap
CPU designers have long used two basic methods for efficient clock design: trees and meshes. Clock trees are the most common approach, feeding a reliable signal throughout the chip using minimal wiring. Even minor differences in the branch structure, however, result in clock skew. This skew is tolerable at modest clock rates, but at 2GHz and above (in current process technology), clock trees become unusable. Switching to a mesh structure reduces skew, but the mesh’s extra wiring greatly increases the power required to drive the clock signal.
Companies such as Intel and AMD use clock-mesh designs to deliver 3GHz and 4GHz processors. In part because of the clock mesh, these processor chips burn as much as 140W. Consumer products require much lower power levels, so companies such as Broadcom and Texas Instruments (TI) use clock trees in processors that run at speeds of 1GHz or so. The problem is that consumer products have now blown past 1GHz to 1.5GHz and above, limiting the use of clock trees. At the same time, AMD and Intel are seeking to reduce the power of their PC and server processors. Because the clock circuit uses more power than any other part of a CPU, it is a huge opportunity for power savings.
A startup called Cyclos has developed intellectual property (IP) to help processor designers build a resonant clock mesh. In a traditional design, the clock driver and buffers burn power on every cycle. Cyclos instead generates the clock signal using a resonant LC circuit, known as a tank circuit. It creates a sine wave with a frequency determined by the inductance and capacitance of the circuit. Because the electrons flow back and forth during each oscillation, the circuit consumes little power. Because the low-power tank circuit can easily drive the entire clock mesh, this approach eliminates most of the clock buffers in a traditional design and thus much of the clock power.
Although the idea of resonant clocks isn’t new, Cyclos has developed a set of techniques to implement this idea in real processor designs. As a proof of the company’s technology, AMD today announced that its next-generation Piledriver CPU uses a resonant clock mesh designed with Cyclos. ARM has also licensed the startup’s technology, as have two undisclosed companies working on Cortex-A15 processors. This trend portends a major change in high-speed processor design.