Altera asserts that the separate challenges of logic design and parallel programming have a common solution: OpenCL. Developed to harness the floating-point engines (shaders) in GPUs for general-purpose programs, OpenCL is a framework that enables programmers to produce massively parallel software in C. Altera has now adapted this framework to be a high-level synthesis (HLS) tool, making logic design an exercise in parallel programming. Partially a response to rival Xilinx’s success with HLS and partially a response to competitive threats from OpenCL-programmed GPUs in some applications, Altera’s adaptation creates a new view of how FPGAs can implement parallelism. It also lowers the barrier to digital design compared with RTL programming.

The trick is to map OpenCL code—originally intended to target the CPU-like shaders of a GPU—to an FPGA’s logic gates, memory, multiply-accumulate units, and wires. These resources map naturally to RTL but not to C or OpenCL; thus, Altera developed an OpenCL-to-RTL source-to-source compiler. But these resources also endow the FPGA with flexibility that a GPU cannot match. Whereas a GPU is an array of SIMD cores, an FPGA can implement many different functions and perform different operations on different data.

Compiling OpenCL software to FPGA hardware is more than a series of steps. It is a bridge between two types of parallelism: coarse-grain parallelism defined through OpenCL programming and fine-grain parallelism afforded by the FPGA. Coarse-grain parallelism invites programmers to a model in which massive parallelism is easily obtained but comes at the expense of closely coupled parallel processes—the opposite of multithreading, in which threads share memory but synchronization is difficult.

In numerically intense OpenCL applications, FPGAs compare favorably with GPUs despite lagging in floating-point performance because of their logic programmability. Thus, designers that once relied exclusively on CPUs and are considering GPUs to implement complex algorithms now have the opportunity to use custom logic for improved performance while preserving their software-based development model.