» Current | 2017 | 2016 | 2015 | Subscribe

Linley Newsletter

Quantenna Debuts 8x8 MU-MIMO

September 29, 2015

Author: Loring Wirbel

After demonstrating an 8x8 MU-MIMO configuration that delivers dual-band throughput approaching 10Gbps, Quantenna has announced sampling of four chipsets in its QSR10G family. The company simultaneously disclosed pacts with Cavium and Freescale to develop gateway and router reference designs that pair its True 8x8 QSR10G with Cavium’s Octeon III and Freescale’s QorIQ LS1043A processors.

The common baseband chip, the QT10xx, combines with RFIC chips optimized for a particular number of streams: the QT7810B for 5GHz 8x8 and the QT6210B for 2.4GHz 4x4. All chipsets enable dual radios, except the low-end QSR10G5, which uses only 5GHz radios to offer an 8.6Gbps data rate and eight-stream operation. The entry-level product is intended to upgrade SoC designs that already integrate a 2.4GHz radio.

The remaining chipsets with dual-radio support include the QSR10GU, which offers a full 12 streams of 8x8 and 4x4 MU-MIMO for a maximum 9.6Gbps PHY rate; the 10GA, which offers 10 streams of 8x8 and 2x2 for a 9.1Gbps rate; and the QSR10PA, which offers 8 streams of 6x6 and 2x2 for a 7.0Gbps rate.

Caveats apply to the performance expectations, however. In real-world implementations, most clients will use standard QAM-256 rather than Quantenna’s proprietary QAM-1024 modulation. The maximum PHY rates also assume in the case of the QSR10GU, QSR10GA, and QSR10PA that OEMs will use two radios to achieve optimal throughput. Although other vendors offer dual radios in their 4x4 MIMO products, it remains uncertain whether this configuration will become a typical OEM gateway or router design.

Subscribers can view the full article in the Microprocessor Report.

Subscribe to the Microprocessor Report and always get the full story!

Purchase the full article

Events

Linley Processor Conference 2017
Covers processors and IP cores used in deep learning, embedded, communications, automotive, IoT, and server designs.
October 4 - 5, 2017
Hyatt Regency, Santa Clara, CA
More Events »

Newsletter

Linley Newsletter
Analysis of new developments in microprocessors and other semiconductor products
Subscribe to our Newsletter »