The Linley Wire
Independent Analysis of the Networking-Silicon Industry

Volume 4, Issue 6
March 25, 2004

Editor: Linley Gwennap
Contributors: Bob Wheeler,
Jag Bolaria, Sanjay Iyer

In This Issue

  • EZchip Discloses Next-Generation NPUs
  • LSI Logic Acquires Velio, Crosslayer
  • 10GbE Over Copper Lurches Forward
  • News In Brief
  • New Report: Search Engines and Networking Memory

A Guide to Communications Processors is your roadmap to the latest trends in CPE applications. Order by March 31 and receive a prepublication discount. For more information, visit our web site.

EZchip Discloses Next-Generation NPUs

Last week, EZchip announced two next-generation NPUs that are due to sample in 4Q04. The NP-2 family will integrate both ingress and egress traffic managers, making these chips the first store-and-forward NPUs from EZchip. The first two NP-2 models, the NP-2s and NP-2e, are both single-chip full-duplex 10Gbps NPUs. Compared with the NP-1c, the new chips add two traffic managers, 10 GbE MACs, and support for up to 192 channels (STS-1 granularity) on one SPI-4.2 interface. The new chips also drop the wide CSIX-L1 fabric interface found on the NP-1c in favor of a CSIX-over-LVDS interface like that found on the Intel IXP2800.

The NP-2 integrates sophisticated traffic managers with major enhancements over EZchip's existing QX-1 TM. Both ingress and egress TMs support 64K queues with up to five levels of scheduling hierarchy. EZchip says the TMs will support full wire speed (25Mpps) for minimum-length POS packets as well as 64-byte Ethernet frames. The NP-2 will support a choice of DDR2 SDRAM, FCRAM-II, and RLDRAM-II for both table and packet memories.

With the NP-2, EZchip is also revamping its approach to design and manufacturing. While the NP-1c is built in IBM's 0.13-micron process using an ASIC design flow, the NP-2 will be built in TSMC's 0.13-micron process using a COT flow. This move should reduce the NP-2's manufacturing cost as it ramps to high volume, but it also adds schedule risk to the NP-2 program. With dual SPI-4.2 interfaces, the NP-2s is intended for POS applications and is priced at $795 in volume. The Ethernet-only NP-2e is priced at $595 and omits the 192-channel SPI-4.2 interface.

If EZchip delivers the NP-2 on schedule, it could be first to market with a single-chip full-duplex 10Gbps NPU/TM. But more important, the NP-2 family will solidify EZchip's position as the leading 10Gbps NPU vendor. —BW

Complete coverage of EZchip's NP-1c and QX-1 appears in our report "A Guide to Network Processors."

LSI Logic Acquires Velio, Crosslayer

This week, LSI Logic announced plans to acquire Velio and the assets of Crosslayer, both located in the Silicon Valley. LSI will acquire Velio for $20 million and Crosslayer's assets for an undisclosed amount, reportedly around $3 million.

Velio is a fabless vendor developing switch fabrics and high-speed interconnect products. The startup had raised $95 million over three rounds of funding. Although Velio was shipping production parts, we believe it was not profitable. In December 2003, Velio sold its high-speed interconnect technology to Rambus after significantly reducing its staff. Thus, LSI appears to have acquired only the cross-connect technology.

Founded in August 2000, Crosslayer had raised about $6 million and was developing a Gigabit Ethernet switch for LAN and metro Ethernet applications. The startup failed to sample a product and essentially closed operations while still in stealth mode. LSI acquired no Crosslayer employees but has access to the product design and concepts that the company had developed.

With the acquisition of cross-connect, switch-fabric, and Gigabit Ethernet switch technology, LSI is attempting to broaden its product line from ASIC products to standard networking silicon, a strategy we see as necessary for future growth. Although LSI has acquired a diverse range of networking technologies with a relatively low investment, the company faces an uphill battle in integrating the acquired technologies into a coherent roadmap and competing with entrenched competitors. —JB

More information on Velio appears in our report "A Guide to High-Speed Interconnects."

10GbE Over Copper Lurches Forward

Last week, the 802.3an Task Force held its first meeting and began formal development of the 10GBase-T standard. Although the 10GbE standard was approved in 2002, it did not include a PHY layer for operation over twisted-pair copper cabling. Like 1000Base-T, 10GBase-T is intended to work over four-pair structured horizontal cabling. But unlike 1000Base-T, the new standard is unlikely to reach 100m over installed Cat5 or Cat5e cables. The group's initial objective is 55m reach over Cat6 (Class E) and 100m reach over Cat7 (Class F).

Although the 10GBase-T Study Group (the precursor to 802.3an) has been meeting for more than one year, the transition to a Task Force has opened the door to new channel-coding proposals. The most radical new submission came from a Japanese consortium, which proposed the use of OFDM on top of PAM at the subcarrier level. In a small step forward, the Task Force agreed on a channel model, which will be used in evaluating competing coding schemes in future meetings.

While battles brew in 802.3an, silicon vendors are demonstrating prestandard implementations over twisted pair cabling. Startup KeyEye Communications struck first, demonstrating 10Gbps operation over four-pair Cat6 in December 2003. But KeyEye's simple PAM4 technique falls short of 10GBase-T reach objectives. This week, startup SolarFlare Communications claimed to have transceiver silicon capable of 100m reach over Cat5e. It appears, however, that SolarFlare has only a DSP in silicon and lacks an analog front end and ADC/DAC functions.

With a final draft of the 10GBase-T specification not expected until mid-2005 at the earliest, other silicon vendors still have time to develop products. We expect larger vendors such as Broadcom, Intel, and Marvell to be less vocal about their product plans until a stable draft appears. —BW

More coverage of trends in high-speed Ethernet technology appears in our report "A Guide to Gigabit Ethernet Silicon."

News in Brief

On Monday, Texas Instruments announced a new 802.11g chip set for handheld designs. The two-chip design combines a tiny 8mm by 8mm MAC/BB chip and a new transceiver with integrated power amplifier. The direct-conversion radio is TI's first new design since its July 2003 acquisition of Radia Communications. Production of the TNETW1250 MAC/BB and TNETW3422M radio is scheduled for "mid-year". Meanwhile, Broadcom's BCM4317 single-chip 802.11b product for handhelds has reached volume production. PDA and handset designers now have a real choice between 802.11b and 802.11g. These compact and power-efficient solutions could also enable new WLAN applications such as digital cameras and MP3 players. —BW

Complete coverage of TI and Broadcom WLAN devices appears in our report "A Guide to Wireless LAN Chip Sets."

Last week Broadcom announced the NetLink family of Gigabit Ethernet controllers for SMB and consumer LAN-on-motherboard designs. The NetLink BCM5788 is simply a defeatured version of the company's NetExtreme BCM5705. To reduce cost and power, Broadcom is shedding some baggage carried by the 5705, specifically one of two MIPS cores and an unspecified amount of SRAM. The NetLink brand should allow Broadcom to better compete with Marvell and Realtek for white-box designs, while protecting its NetExtreme pricing at Dell, HP, and IBM. —BW

Complete coverage of Broadcom's GbE controllers appears in our report "A Guide to Gigabit Ethernet Silicon."

New Report: A Guide to Search Engines and Networking Memory

"A Guide to Search Engines and Networking Memory" has been extensively revised to provide the deep insight and technical analysis you need to understand the dynamic world of networking accelerators and memory.

Get up to date on the fast-changing world of high performance CAM-based search engines. New vendors continue to enter this rapidly growing market while others beat a hasty retreat. IDT and Cypress lead, but other vendors are challenging them with innovative methods of increasing performance. We take an in-depth look at the latest search engines from Cypress, IDT, NetLogic, SiberCore and others.

This edition includes all-new coverage of networking DRAMs which may be used with search engine algorithms for high-speed lookups. In the absence of a single standard, several DRAM technologies are vying to solve this problem, each with a different set of technical and business tradeoffs. Networking DRAM vendors covered include Micron, Toshiba, Samsung, Infineon, and Rambus.

Do you know how these vendors are positioned as the market continues to rebound? Are you aware of which products are poised to succeed and why? Only The Linley Group's unique technology analysis can provide this forward-looking view. Get product comparisons that cut through the vendor hype and help you make sense of this market.

Order by April 30, 2004 to get a special prepublication discount. For more information on this new report, visit our web site.

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