Editor: Linley
Gwennap In This Issue
A Guide to Storage Networking Silicon is now available for immediate delivery. Get up-to-date information on storage networking, including SAN, NAS, and IP storage. New in this edition is coverage of Fibre Channel and SAS/SATA devices, an emerging category of storage processors that is starting to heat up. For more information, visit our web site. NPU Market Sees Broad-Based Expansion The Linley Group has completed its survey of the network-processor market for 2004. Our final data shows NPU revenue grew an outstanding 61% over 2003 to reach $145 million. The market even managed to grow slightly in 2H04 over 1H04, despite market-leaders AMCC and Intel suffering revenue declines. The inventory correction seen across the broader markets slowed, but did not stall, NPU expansion. Our data also reveals that, with only one exception, every vendor increased its NPU revenue in 2004. Intel contributed the most dollars to the market’s growth, gaining 6% market share as a result. Despite losing an equal amount of share, AMCC still increased its NPU revenue by more than any vendor except Intel. Thanks to initial shipments of its APP500 family, Agere gained share while nearly tripling its NPU revenue. Hifn increased revenue from the former IBM PowerNP line by about 40%, resulting in a small share loss. But with first-year revenue surpassing the amount Hifn paid for the product line, the company should be very pleased with its results. Vitesse continues to defy gravity, maintaining share without active product development. Although Vitesse clearly has the most profitable NPU business of any vendor, it will begin losing share as current design wins reach end of life. As the only vendor to experience declining NPU revenue in 2004, Freescale is already seeing its discontinued C-Port line ramp down. Startups Wintegra and EZchip showed strong growth, thanks to their focus on the underserved access and 10Gbps markets, respectively. Wintegra was the leading NPU startup in 2004, roughly doubling its revenue over 2003. EZchip nearly tripled its revenue in 2004, but its share of the overall market remained below 5% in 2H04. Although 2004 closed stronger than anticipated, we continue to believe that NPU growth will slow this year. We now expect the NPU market to reach about $175 million in 2005. This slower growth rate should be sustainable through 2008, however, as NPUs continue to replace ASICs and fixed-function ASSPs. —BW Complete coverage of the NPU market appears in our report A Guide to Network Processors.
The Vatican may be blowing smoke, but Microsoft’s TCP Chimney isn’t, after U.S. District Court judge Jeffrey White granted Alacritech a preliminary injunction preventing Microsoft from developing or distributing its TCP offload software. A pioneer in the development of TCP offload, Alacritech had sued Microsoft for infringing on its patent 6,697,868, one of several patents that Alacritech has been granted on its technology. Several companies have developed TCP offload chips, ranging from giants such as Broadcom to startups such as Astute and Silverback. TCP offload is useful for Gigabit Ethernet connections, reducing the load on the main server processor, and highly recommended for 10 Gigabit Ethernet. Most of these chips don’t work with Microsoft Windows today but will work with TCP Chimney, due to be released in mid-2005 as part of the Scalable Networking Pack for Windows Server 2003 and also as part of the “Longhorn” operating system in 2006. Alacritech’s legal action may stall these releases or cause Microsoft to remove TCP Chimney from the code. Microsoft has already been forced to strip TCP Chimney from its beta releases and is forbidden from doing internal testing or development. If this situation continues for months or years, it would severely limit the revenue potential of the chip companies in this space and slow the adoption of 10G Ethernet. Microsoft has few options. It can appeal the injunction, but such appeals are rarely won. It can hope to prevail in a full trial, but the 868 patent clearly bears on TCP Chimney, and Judge White has already rejected Microsoft’s claims that the patent is invalidated by several cases of prior art. Unless Microsoft comes up with additional instances of prior art, its chances of winning at trial are poor. Even if it does eventually prevail, its TCP offload plans could be in limbo for several months, pushing TCP Chimney out of the Longhorn release and beyond the window for 10G Ethernet deployment. We expect Microsoft to instead settle the case. Because Alacritech disclosed its TCP technology to Microsoft in 1999 under a non-disclosure agreement, Microsoft could be found liable of “willful violation.” Such a finding would result in triple damages, an amount that could easily exceed $100 million. The software giant would be better off cutting a big check to Alacritech instead of stalling the adoption of TCP offload technology. —LG Additional coverage of TCP Chimney and TCP offload chips appears in our recent report A Guide to Gigabit and 10G Ethernet Silicon. Last week, Adaptec and Vitesse took the wraps off an alliance that positions Vitesse as a preferred SAS silicon supplier to Adaptec. The first products from this alliance—the single-chip VSC7250 and VSC7251 RAID controllers—combine Adaptec’s software and RAID 5/6 hardware accelerators with Vitesse’s CPU and SAS PHY technology to deliver up to 4GB/s RAID throughput. The VSC7250, which provides 8 SAS ports and uses an eight-lane PCI Express interface, lists for $64 in high volumes; the VSC7251, with four SAS ports and a four-lane PCI Express interface, lists at an affordable $46. These low-priced RAID controllers address a potentially huge SOHO and SMB market. Both devices will sample in May. In a separate development, Adaptec struck a deal to outsource development of a 10Gbps iSCSI controller to startup ServerEngines, instead of using the in-house team from its Platys acquisition. The 10Gbps controller will be compatible with Adaptec’s current Vega controllers. Like the Vitesse deal, the ServerEngines agreement includes the transfer of some Adaptec engineers and intellectual property to jump-start development. Taken together, these two deals signal the end of chip development at Adaptec. Perhaps not coincidentally, Ahmet Houssein recently left his role as GM of Adaptec’s Storage Solutions group, which developed SAS and iSCSI chips, to become CEO of storage-processor startup Silverback. Adaptec’s move acknowledges that storage silicon is on its way to becoming a commodity, moving the value to software, interoperability, and support. While semiconductor vendors such as AMCC and LSI juggle a storage-systems business alongside their primary semiconductor business, Adaptec has wisely chosen to drop silicon development and focus only on systems and software; its new priorities mean that the company can expand its storage-systems business, as it did by acquiring SAN-server vendor Snap Appliance. Adaptec’s chipless strategy is a boon to Vitesse and ServerWorks, who gain a special relationship with a seasoned storage vendor. —SI Complete coverage of storage processors appears in our report A Guide to Storage Networking Silicon.
This week, IDT announced plans to offer a family of RapidIO switches, which it expects to sample in early 2006. These switches will be useful in connecting clusters of DSP and embedded processors in wireless infrastructure and similar applications. Previously, IDT had announced SPI-4 bridges and PCI Express bridges and switches, as well as its plans to offer components for ASI. The combination of these products represents a concerted effort to address board-level and system-level interconnect beyond the PC. IDT has focused on developing several board-level interconnects for specific market segments but a common system-level interconnect. The company has not announced plans to offer system-to-system interconnect products, however. IDT appears to have segmented board-level requirements among networking, wireless infrastructure, and embedded applications. The common board-level interconnect technologies used in these applications are SPI-4, RapidIO, and PCI Express/RapidIO, respectively. IDT plans to offer a bridge and switch product for each of these technologies. The boards using these technologies are then connected over the system backplane using ASI. The company has yet to announce details on its ASI products. IDT is embarking on a clear strategy, which offers it the potential to establish leadership in the rapidly growing interconnect market. A critical factor for this strategy, however, is the timing for the adoption of new technologies such as RapidIO and ASI. Additionally, the company must execute on several development fronts before it can translate the strategy into real revenue. —JB Complete coverage of IDT’s newest products and other interconnect products will occur at our live seminar event on April 27 (see below). Xelerated has closed a $17 million third round of funding. This round included new investors Accel Partners and Amadeus Capital Partners. Xelerated says the new funding should carry the company to profitability, which is expected in 2006. Separately, Xelerated says it has taped out its X11 second-generation network processor and that early samples will reach customers in July. Considering that Xelerated originally targeted the OC-768 market, the startup deserves a great deal of credit for surviving the NPU market consolidation. —BW Complete coverage of Xelerated appears in our report A Guide to Network Processors. Earlier this month, TeraChip announced that it had raised an additional $7 million from Accel Partners and Benchmark Capital. The company has also added a new CEO, Rod Kay, replacing Micha Zeiger, who takes over as the Chairman of the board and CTO. Now, the startup needs a new direction and flawless execution to establish a market position. With the latest funding, TeraChip will need to leverage its existing architecture to create a new family of fabric products that is differentiated from existing products and targets a developing market: a tall order for a startup that has yet to make its mark. —JB Join us on April 27 in San Jose, CA for a free one-day seminar on Fabrics and High-Speed Interconnects. This technical program will consist of a tutorial by Jag Bolaria, senior analyst at The Linley Group, followed by three in-depth sessions packed with information from industry leaders. New additions to the technical program: * Ron Wilson, Semiconductor Editor, EE Times, "EE Times Backplane Survey Results" Session I: Board Level Interconnects: * Delfin
Rodillas, Staff System Architect, Xilinx, "FPGA Serial
Interconnects" Session II: Panel Discussion: Selecting the Future Form
Factor Panelists include: Eddie Reid, Chair, PCI-SIG PCI Express, SIOM; Rob Davidson, VP of Marketing, ATCA; Melissa Heckman, Vice Chair of the VSO, VME; Andrew Alleman, Systems Architect, Radisys Session III: System or Advanced Interconnects * David
Formisano, Technical Marketing Manager, Intel, "Connecting
the Modular Communications Platform: Standard Fabrics and Interconnects" For the full program of topics and speakers, visit our web site. The seminar is free to qualified individuals who register early. Non-qualified registrants will be charged a fee. For complete details and registration information, visit the seminar page. This event is sponsored by IDT, StarGen, Sandburst, Intel, Xilinx, and InfiniBand Trade Association.
To receive The Linley Wire via e-mail, click here
|
