Editor: Linley
Gwennap In This Issue
A Guide to Next-Generation Wireless is now available for immediate delivery. Are you up to speed on the plethora of new wireless standards emerging for the PAN, LAN, and MAN? For more information, visit our web site. Check out our new survey! We want your input on designs for next-generation systems. Are you designing systems using ATCA and, if so, what backplane are you using? Click here to participate in our survey and view the current results. Wireless USB Silicon On The Way The past two weeks have seen a flurry of announcements around Wireless USB (WUSB) and its underlying WiMedia UWB PHY. At the Wireless USB Developers Conference in Tokyo, Realtek demonstrated its first UWB product, the RTL8170 WiMedia PHY. Realtek's design combines RF and baseband functions on a single 0.13-micron CMOS die, which comes in a compact 7mm package. The RTL8170 implements a standard WiMedia MAC-PHY interface for connection to Wireless USB or WiNet MAC devices. Realtek becomes the second vendor, following Staccato, to demonstrate a single-chip WiMedia PHY. Meanwhile, Alereon is completing its Wireless USB solution with the addition of MAC functions. The startup announced the AL4300 WUSB MAC/baseband chip for 1Q06 sampling. When combined with the existing AL4100 WiMedia radio, the AL4300 forms a two-chip solution for WUSB devices. The AL4300 includes SDIO, Compact Flash (CF and CF+) and parallel-bus interfaces for integration into a variety of consumer-electronics products. Customers that prefer a PHY-only solution can use Alereon's AL4200 baseband chip, which is already sampling. WUSB device (as opposed to host) MACs can implement a subset of the full WiMedia MAC. This allows Alereon to complete the design of its WUSB chip despite the fact that the WiMedia MAC specification has not been released. Synopsys is offering WUSB device controller (MAC) intellectual property (IP) for integration into system-on-chip designs. The IP core implements a WiMedia MAC-PHY interface for connection to standalone PHY devices such as those from Alereon, Realtek, Staccato, and Wisair. In addition to the MAC core, the Synopsys design requires firmware running on an separate CPU. The company's demonstration uses an FPGA combined with an ARM9-based CPU. The Synopsys DesignWare Wireless USB Device Controller IP is available now to early adopters. These and other forthcoming products set the stage for WUSB interoperability testing in 1H06. While Intel remains quiet about plans for WUSB in PC platforms, the company is providing host-side WUSB development kits and hosting an interoperability lab. Given this increasing momentum, we expect WUSB shipments to reach millions of units in 2007. —Bob Complete coverage of UWB and Wireless USB appears in our new report A
Guide to Next-Generation Wireless.
With features not found in enterprise-class Ethernet switches, the Packetry II chip set is clearly aimed at metro Ethernet designs. In addition to L2 switching and IPv4/v6 forwarding, Packetry II supports MPLS LER/LSR, L2 and L3 VPNs, and IPv4/v6 tunneling. The chip set also supports a large number of queues and a multi-level scheduler. The G8000 buffers packets in external RLDRAM, while forwarding tables are kept in external TCAM. Despite these advanced features, a 24xGbE+2x10GbE design requires only one G8000 device, a pair of G135 devices, and memories. With Packetry II, Greenfield attempts to fill the hole between high-volume Ethernet switch chips from companies like Broadcom and programmable NPUs from EZchip, Sandburst, and Xelerated. But with metro protocols still evolving, the question is whether or not OEMs will be comfortable with a fixed-function design. Although fixed-function devices dominate enterprise-switch designs, Packetry II could be ahead of the adoption curve in metro-Ethernet switches. —Bob Additional
coverage of Greenfield appears in our report A
Guide to Network Processors.
On Monday, a new consortium was announced with the stated goal of accelerating the development of the 802.11n draft standard. The Enhanced Wireless Consortium (EWC) is a formal SIG made up of many of the companies from the TGn Sync group plus Broadcom and Conexant from the WWiSE camp. The EWC plans to make its specification public in the next week. Previously, the competing TGn Sync and WWiSE groups had agreed to work on a joint proposal for submission at the 802.11n task group's (TGn) November meeting. Because the joint proposal (JP) group was officially sanctioned by TGn, the EWC will try to get the JP to adopt its specification. Beyond these official groups, there appear to be three camps divided by market segment: PC, consumer electronics (CE), and cellular handsets. The PC-centric companies are backing the EWC, the CE companies appear split, and the handset-centric vendors are not backing the EWC. Airgo Networks has not joined the EWC and is instead aligning itself with the handset companies and some of the CE vendors. For any proposal to be adopted as the draft 802.11n standard, it must receive 75% of the votes within TGn. It is not clear if the EWC can muster this level of support for the November meeting. The holdouts may concede, leading to a complete draft in short order. But the EWC's attempt to "fast-track" 802.11n could instead backfire and simply lead to further delays. The worst-case scenario for the IEEE is a repeat of the UWB deadlock in 802.15.3a, which lead to an industry standard (WiMedia) outside of the IEEE process. All of this leads us to wonder if the IEEE's standards process has become obsolete in today's fast-moving environment. —Bob Complete
coverage of 802.11n/MIMO appears in our new report A
Guide to Next-Generation Wireless. Mark your calendars for October 18-20 when NSDC returns to San Jose. Here are the latest program updates you won't want to miss. Hot new startup Raza Microelectronics will present its XLR, a high-speed multithreaded MIPS processor in Session 201. Principal Architect Dave Hass will describe the architecture of the device and how it can be used to accelerate both networking and security applications. Linley Gwennap opens the conference with the ever-popular Executive Roundtable. CEOs and general managers from leading networking-silicon vendors will discuss key issues facing the industry today. Panelists include Syed Ali, CEO, Cavium; Johan Borje, CEO, Xelerated; Daryn Lau, VP and GM, Communications, AMCC; Martin Lund, VP and GM, Enterprise Switching, Broadcom; and Jitesh Vadhia, SVP and GM, Centillium. Our CTO Roundtable, led by Bob Wheeler, wraps up the conference with some lively debate and thought-provoking discussion. We've gathered together the top technical people from networking-silicon and software companies to discuss key technology trends and system-level design issues. Panelists include David Sonnier, CTO, Agere Systems; M. Raghib Hussain, VP of System Engineering, Cavium Networks; Ofer Iny, CTO, Dune Networks; and Richard O'Connor, CTO, Tundra Semiconductor. For the full program, visit the NSDC
web site.
A Guide to Access Processors has been extensively revised to bring you the latest details on the products and vendors focused on chips for the access infrastructure, which extends from the network edge to customer-premises equipment. Network processors designed for these applications typically operate at speeds of 2Gbps or less. VoP (voice-over-packet) processors that support hundreds of voice channels also serve these applications. As service providers continue to upgrade their broadband infrastructure, more semiconductor vendors than ever before are targeting this hot market. This 150+ page report provides comprehensive coverage of access network processors from Agere, AMCC, Broadcom, Conexant, Freescale, Wintegra, and many more. Also covered are high-density packet-voice processors from Texas Instruments, Centillium, Audiocodes, Freescale, Mindspeed, and Octasic. Like their higher-performance cousins, access network processors are specialized devices for protocol processing. In access equipment, these devices are optimized not so much for raw throughput as for flexible-and predictable-multiprotocol operation. They are often deployed in aggregation equipment such as DSLAMs. High-density voice-over-packet (VoP) processors are the central component of voice gateways used in cellular infrastructure and VoIP networks. Several companies supply VoP processors that can handle hundreds of voice channels. These chips, which combine packet processing and signal processing, convert between packetized voice and analog (POTS) voice in a voice gateway. Often, access network processors are used in conjunction with an array of VoP processors to offload protocol processing and aggregation. This handy guide, packed with valuable information, gives you the analysis you need to help choose a supplier or partner in this field. We guide you through the maze of access and networking technologies and also detail and compare the various processor products that support these technologies. Order by November 15 to get a special prepublication discount. For more information on this new edition, visit our web site.
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