Editor: Linley
Gwennap Special
Oversize NSDC Issue
In This Issue
WILMA SOCKS Linley SITE: Because our web/e-mail server is located in southern Florida, we have been experiencing intermittent downtime due to the effects of Hurricane Wilma. If you have (or have had) any problems contacting us by web or e-mail this week, we apologize and hope you will try again. Wintegra Reaches Second Generation At last week's Network Systems Design Conference (NSDC), Wintegra disclosed its second-generation WinPath architecture for access network processors. The overall structure of WinPath2 is the same as that of WinPath1, but all function units have been upgraded. Wintegra has doubled overall performance by increasing the clock rate by about 50%, to 300MHz, and the number of packet engines from four to six. The control CPU has been updated from a MIPS 5Kc to a MIPS 24K at up to 450MHz. WinPath2 also adds new hardwired accelerators. A traffic-shaping accelerator implements two levels of shaping without software support or five levels with software. Because competing NPUs from Agere and AMCC already have accelerated traffic management, this feature is an important addition for Wintegra. A new cryptography engine accelerates DES, AES, and Kasumi ciphers and MD5, SHA-1, AES and Kasumi hashes. A packet-inspection engine accelerates unanchored searches within packets for applications such as intrusion detection and content switching. With limited immediate applicability, these features anticipate future requirements of access systems to provide, for example, encrypted voice transmission. When the first WinPath2 products sample in 2Q06, their greater performance will be well received. Data rates of access systems are increasing, and Wintegra's strongest competitors have entered the market at the high end. Leveraging the success and code base of WinPath1, Wintegra should see strong demand for its second-generation design. —Joe Complete
coverage of WinPath2 appears in our forthcoming report A
Guide to Access Processors. Also at NSDC, Cavium announced the CN2800 security processor, which adds new capabilities to its Nitrox 2 family, including support for AES-GCM, AES-f8, and SHA-2. AES-GCM can be computed more efficiently than the current AES algorithms, resulting in improved throughput. AES-GCM is being driven by next-generation IPSec ESP requirements. AES-f8 is required for Secure RTP. SHA-2 is needed to replace SHA-1, a widely used hashing algorithm that earlier this year was discovered to have some weaknesses. SHA-2 is expected to be in wide use by 2007. The CN2800 is otherwise similar to the existing Nitrox 2 devices, delivering up to 8.3Gbps of IPSec throughput (with minimum packets) or 40,000 SSL transactions per second. Large-packet throughput ranges to 20Gbps. The chips support both inline and coprocessor designs with PCI-X, SPI-4.2, and multiple RGMII interfaces. The CN2800 is due to sample in 1Q06. Cavium will offer different versions to provide different price/performance points. The Nitrox architecture uses programmable security engines, making it easy for Cavium to support new algorithms simply by changing the firmware. This architecture also allows the processor to shift engines from one protocol to another as needed to meet performance demand. This also means that Nitrox cannot achieve its peak performance on both IPSec and SSL at the same time, but few users need that level of performance. The CN2800 is a useful addition to Cavium's already-strong Nitrox family. —Linley Additional
coverage of Cavium's Nitrox family appears in our report
A
Guide to Security and Content Processors.
Also at NSDC, Stargen introduced its Kestrel chip, which bridges between PCI Express (PCIe) and ASI. This chip complements the Merlin switch chip that the company introduced earlier this year. With a data throughput of 16Gbps, Kestrel can be used in blade servers, networking systems, and other systems that use PCIe as the base interconnect. Together, Kestrel and Merlin create Stargen's AXSys switching platform, which is suitable for connecting multiple processors and multiple PCIe adapters. To support interprocessor communication, Stargen has added message-passing semantics. Kestrel integrates 8 PCI Express lanes, which can be configured as a single port or two x4 ports. The single port provides high bandwidth, whereas the two-port option is useful for redundancy. Kestrel can move data using DMA or programmed I/O. The chip supports quality of service with five virtual channels, which can be serviced using weighted round robin or strict priority. The chip uses credit-based and status-based flow control to manage head-of-line blocking and congestion in the fabric. Kestrel dissipates 3.2W and is priced at $43. Stargen plans to sample Kestrel to customers in November. To help OEMs reduce development time, Stargen is also offering a Kestrel product development kit, which includes a x8 PCIe adapter and device drivers. Stargen is the first and only company to commercially offer a complete ASI fabric. Assuming Kestrel has no critical technical issues, the company should enjoy a six-month or greater lead over competing products. With a track record of shipping its Starfabric into similar applications, Stargen is in a good position to transition from early samples to production. Stargen's bigger challenge will be to build OEM support for ASI while it remains a technology leader. —Jag Additional
coverage of Stargen appears in our report A
Guide to High-Speed Interconnects.
Also at NSDC, Ample Communications disclosed technical details of its Redhawk 2x10GbE MAC device. As might be expected, the device can connect a pair of XAUI ports to a pair of SPI-4.2 ports in a basic 2x10GbE configuration. In addition to XAUI, Redhawk includes 10Gbps XFI line-side serdes for direct connection to XFP modules. But with nearly 10 million gates, Redhawk is far more than a simple MAC device; like Ample's Harrier 24xGbE MAC chip, Redhawk supports intelligent oversubscription. In a single-device configuration, Redhawk supports 2:1 oversubscription by combining traffic from the two 10GbE (XAUI/XFI) ports into a single SPI-4.2 port. Alternatively, the SPI-4.2 port can be overclocked to 625MHz to provide a full 20Gbps of throughput. In multidevice configurations, Redhawk's second SPI-4.2 port can daisy-chain to another Redhawk device for up to 4:1 oversubscription. For designs with a mix of 10GbE and GbE ports, a Harrier device can be connected to Redhawk's second SPI-4.2 port. Using these multichip configurations, a single 10Gbps network processor or ASIC can aggregate 4x10GbE ports or 24xGbE+2x10GbE ports. To handle oversubscription, Redhawk supports sophisticated classification, policing, and shaping and up to eight priority queues per port. The chip's classification engine can use virtually any Layer 2-4 field within the limitations of on-chip table memory. Redhawk can even pass classification results and other information to the SPI-4.2 interface, thereby acting as a packet preprocessor for the NPU or ASIC. To avoid dropping low-priority packets, Redhawk supports optional external DRAM. Unfortunately, the chip supports only FCRAM, which has an uncertain long-term supply. Ample plans to add support for Micron RLDRAM in the next version of Redhawk, due sometime in mid-2006. The
A2122 Redhawk is priced at $350 in volume and is due to sample this
quarter. Although this device is not inexpensive, intelligent
oversubscription
can
help reduce overall system cost. As a result, we see Redhawk as
complementary to most 10Gbps network processors. —Bob This week, UWB-startup Alereon announced its second round of funding. Led by Austin Ventures, Centennial Ventures, and Pharos Capital, the $20 million round brings total funding to $55 million. Alereon will use the funding to move its initial WiMedia PHY chip set to production and continue development of its first Wireless USB solution. Alereon is in a race with Staccato and Wisair to be first to production with a WiMedia PHY. —Bob Complete
coverage of Alereon appears in our new report A
Guide to Next-Generation Wireless. The
rising drumbeat of the ATCA standard is everywhere. The first ASI
fabric, Stargen's AXsys, is now available, with others soon
to follow.
The transition
to a standard chassis design and standard backplanes seems inevitable.
But is it? We are bypassing the hype to ask you, our readers, how
ATCA is doing
in the real world. Let us know (click
here to vote) and
then check out the survey results to see how many people are working
on ATCA-based designs and what
backplanes they
are using. Thanks for your help!
With broadband deployments attracting tens of millions of new subscribers each year, demand for bandwidth is increasing dramatically. The push for triple-play services is affecting both cable companies and carriers alike. Cable TV companies, who traditionally offered only video service, are now adding Internet access and voice services. Traditional telephony carriers, who offered voice and data services, must now incorporate video in order to remain competitive. Consequently, video-over-IP (Internet protocol) is set to fuel significant changes in the access network. A Guide to Next-Generation Broadband Interface Chips delivers a complete analysis of the major vendors offering products for this dynamic market. Vendors for passive optical networks include Broadlight, Centillium, Conexant, Freescale, Passave, and Teknovus. Also covered are leading VDSL2 vendors Broadcom, Centillium, Conexant, Infineon, and Ikanos. We examine the VDSL silicon and PON silicon markets, applications, and vendors as we look at silicon for both ends of the wire: CO and CPE applications. As a result of the shift to triple-play, the industry has moved quickly to establish new standards for enabling these services, making it difficult to keep current on the emerging trends and technologies. "A Guide to Next-Generation Broadband Interface Chips" provides the clear explanations you need to understand this market. The report provides background on these technologies, with in-depth coverage of the chip vendors in each segment, including product details and roadmap information where available. We compare the available solutions and pick our winners for each segment. Only The Linley Group's unique technology analysis can provide this forward-looking view. Order by November 30 to get a special prepublication discount.
For more information on this new edition, visit our web
site. The Linley Group's Latest Column: EE Times Wireless Net DesignLine: How to choose the best
SoC for your WiMAX design
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