The
Linley Wire
Independent
Analysis of the Networking-Silicon Industry
Volume 6, Issue 2
February 3,
2006
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Editor: Linley
Gwennap
Contributors: Bob Wheeler, Jag
Bolaria, Joseph Byrne
In
This Issue
NEW
SEMINAR: The next Linley Tech seminar will be held on Wednesday,
March 29 in San Jose. The topic will be High-End Switch/Router
Design, featuring presentations on leading data-plane and control-plane
solutions. Free admission to qualified attendees is provided by
our sponsors AMCC, Freescale, EZchip, and Xilinx. For more information,
access our web site.
Broadcom
Acquires NPU, Fabric
Last week, Broadcom announced plans to acquire Boston-area startup
Sandburst. The deal is valued at about $80 million, with $75
million in cash going to Sandburst's current stockholders. Sandburst
had raised $72 million in four rounds of funding from venture
and strategic investors.
For this relatively modest sum, Broadcom gets a production-quality
chip set that includes a 10Gbps network processor and a 640Gbps
switch fabric with integrated traffic management. Although Sandburst's
current revenue stream is small, Broadcom will also receive design
wins in strategic platforms at HP, Enterasys, and other major
OEMs. Sandburst's existing design wins include Ethernet switches
for both enterprise-core and metro applications.
Sandburst's high-end fabric is highly complementary to Broadcom's
market-leading StrataXGS GbE switch chips. For chassis designs,
the Sandburst fabric acts as the central switch, while StrataXGS
devices sit on line cards. In fact, Broadcom had already licensed
its HiGig stacking interface to Sandburst for integration in
future switch fabrics. For packet processing, however, there is overlap between Sandburst's
programmable NPUs and Broadcom's fixed-function StrataXGS chips.
The addition of a programmable architecture is important for
Broadcom, as we expect most metro designs will favor flexibility
over cost in the near term.
Overall, this deal
makes sense for all parties. Sandburst, which faced a slow
revenue ramp and the prospect of
further fund raising,
gains instant credibility and resources. Sandburst's investors
find an exit and avoid potential dilution. Broadcom fills out
the high end of its Ethernet switching portfolio with a carrier-class
product. For metro-Ethernet OEMs, this new combination presents
a convincing alternative to internal ASIC development. —Bob
Complete
coverage of Sandburst appears in our reports A
Guide to Network Processors and A Guide to Switch
Fabrics.
Cavium
Delivers Low-Cost Octeon
On Monday, Cavium announced new dual-core and single-core MIPS
processors in its Octeon line. The $125 CN3120 NSP includes all
of the features of other Octeon NSP processors, including security,
compression, and content-inspection engines. The CN31xx family,
which is due to sample this quarter, also includes single-core
versions priced as low as $49.
To reach prices as low as $19, Cavium will offer the CN30xx family,
which excludes the content-inspection engines and associated
memory interfaces. Furthermore, the CN30xx chips use narrower
main-memory interfaces and integrate a smaller L2 cache. With
a 16-bit DDR2 SDRAM interface and 64KB L2 cache, the low-end
CN3005 fits in a BGA-350 and dissipates only about 3W. The CN30xx
family is due to sample in 2Q06.
Although
these new processors are straightforward derivatives of Cavium's
original 16-core Octeon design, they are significant
from a price/performance perspective. At $125 or less, the CN31xx
NSP chips set a new price point for hardware acceleration of
content inspection. These chips should be particularly attractive
for enterprise-class unified threat management (UTM) appliances.
The CN30xx chips hit SOHO price points, filling the gap between
existing Octeon processors and Cavium's Nitrox SOHO line. With
these additions, Cavium now unquestionably offers the broadest
line of processors for security applications. —Bob
Complete
coverage of Octeon appears in our report A Guide
to Security and Content Processors.
NetLogic
Expands Search-Engine Business...
NetLogic's agreement to acquire Cypress's search-engine products injects new
technology into NetLogic and eliminates a major competitor. The agreement, announced
last week, covers Cypress's Sahasra, an algorithmic search engine, and Ayama/70K,
traditional TCAM products. NetLogic agreed to pay $50 million in its common stock
and an additional $20 million if certain revenue targets are achieved within
a year. Essentially, this boils down to $50 million for the Sahasra technology
and up to $20 million for the revenue stream from the TCAM products.
Although Cypress originally wanted to spin out its entire search-engine
business to a private equity firm, the company's largest
TCAM customer (Cisco) preferred
to keep Cypress as its supplier instead of an unknown vendor. Consequently,
Cypress and NetLogic came up with a new option, whereby Cypress
continues to supply current-generation
products to Cisco but NetLogic picks up all of the non-Cisco business. In addition,
NetLogic gets Cypress's next-generation products, including Sahasra, and Cypress
cashes in for $50 million.
NetLogic gets to add immediate revenue and a customer base
from the acquired TCAM product lines. NetLogic, however,
must figure out how to position its
own TCAM chips with these acquired TCAM product lines to win new designs.
In the
long term, the company must consolidate its TCAM roadmap and show a migration
path.
NetLogic had fallen behind both IDT and Cypress in developing an algorithmic
search engine. This acquisition allows NetLogic to plug that hole and potentially
leap frog developments at IDT. NetLogic gets the Sahasra patents as well
as 20-30 employees, which can help the company enhance its recently launched
content
inspection
product line. —Jag
For more information, contact Jag for a custom consulting quote.
...And Adds Content-Inspection Chips
Last week, NetLogic announced sampling of its first product
aimed at Layer 7 switching and security applications. The new
NETL7 product line starts with
a 10Gbps content processor dubbed the NLS1000. The NLS1000 is actually a
two-chip set consisting of a payload control processor (PCP)
and a payload data processor
(PDP). Designed as a look-aside coprocessor, the PCP offers a HyperTransport
host interface. The PCP handles packet flow and contains regular-expression
engines. The PDP handles string matching using an on-chip memory array, which
we believe is based on NetLogic's TCAM technology. NetLogic
disclosed few other product details such as pricing, power, memory size,
or software support. While
the use of
on-chip memory could be a major
limitation, NetLogic might be able to cascade multiple PDP devices much as
it does with TCAMs. On the plus side, the use of on-chip memory enables claimed
performance that is more than double the closest competitor. The question
for NetLogic is when volume applications will require this
level of performance.
Still, this announcement shows that, even as it doubles its bet on traditional
search engines, NetLogic is determined to expand into new technology areas. —Bob
IP
SEMINAR SLIDES AVAILABLE: If you missed our recent Linley
Tech seminar on CPU Cores and Intellectual Property for Networking
and Communications, you can download the presentations from
our web site at no cost. This seminar featured presentations
from The Linley Group as well as leading CPU-core vendors ARC,
Tensilica, MIPS, and Freescale. The afternoon session included
presentations on IP cores from SafeNet, Rambus, GDA Technologies,
and Mentor. We would like to thank our event sponsors: Freescale,
SafeNet, Tensilica, and ARC. SEE
Linley ANALYST SPEAK: Jag Bolaria, senior
analyst of The Linley Group, will keynote the upcoming Synopsys
seminar
on Thursday,
February 16 in Santa Clara. The seminar topic is "Strategies
for Integrating Connectivity IP into Your SoCs," and
Jag's talk will address trends in high-speed interconnect.
For more
information about this event, access the Synopsys
web site.
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