The Linley Wire
Independent Analysis of the Networking-Silicon Industry

Volume 6, Issue 4
March 9
, 2006

Editor: Linley Gwennap
Contributors: Bob Wheeler, Jag Bolaria, Joseph Byrne

In This Issue

High-End Switch and Router Design is the focus of the Linley Tech seminar scheduled for March 29 at the DoubleTree Hotel in San Jose. Space is limited, so register early to reserve your spot. Attendance is free to qualified attendees.

This event is event sponsored by: Freescale, AMCC, EZchip, Xilinx, and Hifn. For more information, visit our website.

 

AMCC, Intrinsity to Develop PowerPC CPU

Last week, AMCC announced that it has partnered with Austin startup Intrinsity to develop its next-generation PowerPC CPU. AMCC currently sells chips based on the IBM-designed PowerPC 405 and 440 CPUs, but AMCC's PowerPC license allows it to design its own CPUs. Rather than turn to IBM for a new CPU, AMCC is taking advantage of its license and working with a third party.

Intrinsity has a unique technology portfolio, starting with its Fast14 technology, which represents a rethinking of chip design at the circuit level. Using standard CMOS fabrication, Fast14 allows chips to achieve greater clock speeds than is possible using traditional design techniques. At one time, Intrinsity produced a MIPS processor in 130nm CMOS that operated at 2GHz, twice the clock rate of other 130nm processors. The small company was unable to market this processor on its own, but it continues to license the Fast14 technology.

Pairing Intrinsity's design skills with AMCC's success in the processor market could be a good combination. AMCC needs a high-performance CPU to extend its reach and service applications such as high-speed control plane, storage, and security. The new CPU could achieve clock speeds of up to 3GHz and is likely to appear in multi-CPU chips. But given that a completely new CPU design typically takes three years, we do not expect the Intrinsity-designed PowerPC CPU to be ready until 2008. Until then, AMCC will continue to rely on its 440-based processors, pushing them to new levels of performance. —Linley

Coverage of Intrinsity and AMCC's PowerPC processors appears in our report A Guide to High-Speed Embedded Processors.


Tarari Announces Content Processing ASIC

At last month's RSA Conference, Tarari announced the T9000 Content Processor. Although the company has been shipping FPGA-based board-level products for several years, the T9000 is Tarari's first ASIC. Designed as a look-aside accelerator, the T9000 combines a large number of purpose-built engines (or agents) in a single chip. The chip contains two each of Tarari's regular-expression agents and grammar-processing agents. Tarari rates the chip at 3.2Gbps of regular-expression throughput and 2.5Gbps of XML throughput. The T9000 also includes agents for encryption, compression, random-number generation, and character conversion.

The T9000 connects with host processors through a 64-bit PCI-X interface. The chip includes dual expansion interfaces that can be used to add external FPGA-based agents. The T9000 is currently sampling and is priced at $300-$400 in volume.

Also last month, Tarari announced its third round of funding. Led by Enterprise Partners (EPVC), the $14 million round brings Tarari's total funding to about $43 million. The new funding will enable Tarari to pursue opportunities in both the network-security and XML-services markets. Eventually, Tarari will need to optimize its chips for one market or the other. But for now, the T9000 enables Tarari to hedge its bets as OEMs explore various approaches to acceleration. —Bob

Complete coverage of Tarari appears in our report A Guide to Security and Content Processors.


News In Brief

Also at RSA, Hifn announced a new 2Gbps NPU. Based on the original Rainier design from IBM, the 5NP2G comes in a lower cost PBGA package. Compared with Hifn's 5NP4G, the new chip omits fabric interfaces and two network interfaces, leaving a pair of GbE ports. Samples are due in July 2006; pricing was not announced. Meanwhile, Hifn received silicon on its Antero second-generation NPU in late January but has not announced availability. —Bob

Complete coverage of Hifn's NPUs appears in our report A Guide to Network Processors.


The Linley Group Announces Market Share Report

For the first time, The Linley Group is pleased to announce a report focused exclusively on market share information. "Networking Silicon Market Share 2005" provides market share information for more than ten categories of wired communications products and high-speed embedded microprocessors. This new report will enable companies to assess the competitive landscape of key product markets and plan their investments accordingly.

The Linley Group team, which includes more analysts focused on wired communications semiconductors than any other industry analyst firm, developed revenue estimates for 70 companies in scores of fine-grained product categories. The estimates are thoroughly validated product-by-product and company-by-company. Companies tracked range from young vendors with less than $1M in annual revenue to large publicly traded chip suppliers, from narrowly focused Asian design houses to broad-line European suppliers.

Product categories include network processors, Gigabit Ethernet components, broadband transceivers, security ICs, voice-over-packet processors, switch fabric and interconnect chips, and high-end embedded microprocessors.

The report is available in either a single or corporate license. The single license includes a brief printed document with summary analysis of the data and a non-printing PDF providing market share tables for more than ten product categories. The corporate license provides the printed summary, a PDF which permits printing, as well as a Microsoft Excel workbook containing the data.

Order by April 7 and save $300 on "Networking Silicon Market Share 2005." For more information, visit our web site.

Upcoming Events:

Join industry analysts Linley Gwennap, CMP's Jim Turley, and BDTI's Jeff Bier at Microprocessor Summit on Monday, April 3 at the Fairmont Hotel in San Jose. Microprocessor Summit, part of the Embedded Systems Conference, focuses on embedded processors, microcontrollers, and digital signal processors.

Register by March 30 with priority code LGRP for a 10% discount on current pricing for any Embedded Systems Conference package.


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