The
Linley Wire
Independent
Analysis of the Networking-Silicon Industry
Volume 6, Issue 10
June 7,
2006
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Editor: Linley
Gwennap
Contributors: Bob Wheeler, Jag
Bolaria, Joseph Byrne
In
This Issue
Time is running
out to reserve your place! On June 14 The Linley Group will host
a one-day seminar on High-Speed
Interconnect Design at the DoubleTree
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Tundra, PLX, IDT, Dune, Pericom, and The Linley Group. For a complete
program listing and registration information, visit our web
site.
PMC
Retargets MIPS Lineup
Last week, PMC-Sierra introduced the MSP8520, the first product
in a new family of integrated processors. The new chip combines
a 1GHz CPU, based on PMC's own E9000 CPU design, with a security
engine licensed from SafeNet. The highly integrated processor
also includes a DDR2 memory controller, dual GbE MACs, and other
I/O. A version without the security engine is available as the
MSP8510. The company has been quietly sampling the new devices
since late last year and expects them to reach production this
month.
These devices are the first to implement PMC's new strategy
for high-end processors. Last year, the company decided
to cancel
development of the 1.8GHz RM11000 CPU and lay off its CPU development
team. Due to limited interest from Cisco and other key customers,
PMC no longer recommends its integrated RM9000-family processors
for new designs, although it is supporting existing customers.
As the MSP8520 shows, however, PMC continues to offer high-performance
integrated processors. The MSP8510 is, in fact, identical
to the old RM9150, and the MSP8520 adds the encryption
engine
to better position it for security applications. The company
plans
to develop additional versions of the MSP8000 family for
specific vertical applications, such as storage. These
products extend
the MSP line, which also includes processors for VoIP and
DSL/PON gateways.
Having
lost its role as Cisco's primary supplier of control-plane processors,
PMC's new strategy leverages its existing processor
portfolio for new applications while maintaining low development
costs. So far, the company has used a shrewd combination
of acquisitions and IP licensing to enhance its processors
with
new capabilities.
If PMC continues to execute well, it will remain a key
supplier of high-speed processors. —Linley Additional
coverage of PMC-Sierra's MSP processors will appear in our
upcoming report A Guide to SOHO Gateway Processors.
Bay's Chesapeake
NPU Hits 40Gbps
In May, Bay Microsystems disclosed a new chip, called Chesapeake,
designed to be the first integrated NPU/TM device to operate at
40Gbps. Based on Bay's existing Montego architecture, the leading
10Gbps NPU/TM device, Chesapeake cranks up the performance to 122
million packets per second, enough for two full-duplex OC-192 ports
or 24 GbE ports at minimum packet sizes. The chip includes a wire-speed
SAR, allowing it to perform interworking among Ethernet, POS, ATM,
and other protocols at these speeds.
The chip also contains a sophisticated traffic manager that
is equally adept at handling unicast and multicast (e.g.
IP TV) traffic
while providing QoS for voice and video and enforcing service-level
agreements (SLA). The chip's unique internal architecture is
powerful yet programmable. Bay does all of the programming
of the internal
engines, providing the OEM with an API to simplify creating
the data-plane code. Most remarkably, the chip is expected
to require
only 16W at 40Gbps. The company expects Chesapeake to sample
this summer.
Although
Xelerated's X10 was the first NPU to hit 40Gbps, that product
lacked TM or SAR functions. With its interworking
capability and high level of integration, Chesapeake is
ideal for multiservice
switches (MSSW) and other Metro equipment. A single chip
can support a complete pizza-box design or a powerful line
card.
Assuming Bay
can deliver Chesapeake as promised, the company should have
smooth sailing in the metro NPU market. —Linley
Additional
coverage of Bay's products appears in our report A
Guide to Network Processors.
AMCC nP3665 Tackles Cellular Infrastructure
At Globalcomm this week, AMCC unveiled a chip set targeted
at cellular infrastructure. The set includes a new network
processor, called the nP3665, as well as AMCC's Amur framer
and the company's newest high-performance CPU, the PowerPC
440GRx. Rounding out the offering, the company provides
production-quality NPU firmware for AAL2, AAL5, IPv4, and
IPv6. The nP3665, the new NPU, derives from the nP3700 family
and most closely resembles the nP3705. Like that device,
the 3665 integrates a single 700MHz packet engine, based
on AMCC's well-established nP architecture, and a traffic
manager. The 3665 has fewer interface options than the
3705. It sports a GbE and a SPI-3 port along with either
a second GbE port or a Utopia-2 interface, omitting the
3705's options for supporting SPI-4.2 and a dozen Fast
Ethernet interfaces. AMCC rates both chips at 2xOC-12.
The 3665 is sampling now with production expected by
the end of the year.
The Amur framer has already been introduced and is
also positioned as a companion to the 3705 for
multiservice
access applications. Amur connects to the 3665 using
SPI-3. On the line side, it connects to either one
OC-12 or four
OC-3 interfaces and can terminate up to 1,024 DS0 channels.
The 440GRx is a PowerPC CPU operating at up to 667MHz.
It adds DDR2 support, a pair of GbE interfaces, and
security acceleration to the proven 440 core. AMCC's
microprocessor
product line is already commonly used in mobile infrastructure,
providing AMCC a starting point for launching the
new three-chip set.
Competition
in the cellular-infrastructure market is heating up.
Rival Agere used Globalcomm to announce
another mobile-infrastructure
design win at NEC, and Wintegra is also targeting
this
market. AMCC distinguishes itself from competitors
by offering a complete chip set, including the
popular PowerPC
CPU—a
key technology that only Freescale can match. As
cellular operators provide the triple play of voice,
video, and
high-speed data services and incorporate IP into
their networks, NPUs become attractive because of their
flexibility.
—Joe
Complete
coverage of AMCC's nP3705 and Amur framer appears in
our report A Guide to Access Processors.
New
Report: A Guide to SOHO Gateway Processors Residential and SOHO gateways are evolving rapidly as home
networking technology changes and service providers roll
out faster broadband links with new services such as voice
and video. Powering these gateways are inexpensive yet
flexible processors packed with features to support these
changes.
Leading this market are companies such as Broadcom,
Conexant, Texas Instruments, and Atheros that have
combined their
wireless, broadband, or VoIP technologies with basic
RISC CPUs. Competitors such as Ikanos, Infineon,
and PMC-Sierra
are challenging the incumbents with new designs that
have integrated voice processing and dedicated
packet processing
to handle faster networks. The result is a rich array
of options from several new and established vendors.
A Guide to SOHO Gateway Processors provides an in-depth
look at the products and vendors for this market. Building
on our "Guide to Communications Processors" published
last year, this report provides extensive coverage of processors
with integrated DSL, cable, 802.11, and/or voice functions.
It also provides background on this market and helps you
sort through the plethora of CPE and networking technologies.
This detailed report, packed with valuable information,
brings you up-to-date on the latest developments in broadband
and home networking. It can provide the analysis and product
comparisons you need to help choose a supplier or partner
in this field. Order by June 30 to take advantage of a special prepublication
discount. For more information on this report, visit
our web
site.
Did
you know that The Linley Group now publishes a
newsletter focused on semiconductors for consumer
electronics? Here are headlines from the latest
edition of Linley on CE:
- PMC-Sierra
Enters DSL Market
- PowerQuicc
8323 Targets SOHO
- Infineon
Adds Cell-Phone Processors
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