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A Guide to High-Speed Embedded Processors is available for immediate delivery. Get the latest information on the speedy chips driving networking applications, automotive, consumer devices, industrial control, and much more. For more information, visit our web site. Yesterday, Cavium announced plans to sample in 1Q07 an upgraded version of its 16-CPU Octeon processor, called Octeon Plus, that will push the CPU speed as high as 1GHz. The new chip should be faster, by a good margin, than any other announced processor for software that scales well across many CPUs. Packet processing, for example, is well suited to this architecture because individual packets can be processed in parallel on different CPUs. Octeon Plus is fully pin- and software-compatible with the original Octeon, which is currently in production, providing an easy upgrade for existing designs. Both chips include a set of 64-bit MIPS CPUs with integrated encryption units as well as hardware accelerators for pattern matching, file compression, and packet preprocessing. Octeon Plus gets its performance boost by a shrink from 130nm to 90nm CMOS, which not only boosts the top speed from 600MHz to 1GHz but also allows for larger caches and additional hardware accelerators. Compared with its archrival XLR from Raza Microsystems, the original Octeon delivered similar performance using twice as many CPUs at half the clock speed. With nearly the same clock speed as the XLR, Octeon Plus will provide the best of both worlds. Raza will find it more difficult to pull the same trick, as the XLR is already manufactured in 90nm CMOS. Although Octeon Plus can be configured with 4 to 16 CPUs, we expect Cavium to eventually sample single- and dual-CPU versions, probably in 2H07. Increasing the speed of these versions will be even more important, as these chips are often used for applications that don't scale well in processors with several CPUs. Sampling a 1GHz multicore processor less than two years after the first Octeon would be an impressive feat for Cavium's top-flight design team. This strong execution is helping the company build a formidable product portfolio for a range of embedded applications. —Linley Complete
coverage of Cavium's Octeon appears in our report A
Guide to Security and Content Processors.
Today, Freescale announced two new PowerQuicc III processors, the MPC8568E and MPC8567E. As with earlier PQ3 devices, the new chips incorporate Freescale's e500 CPU based on Power Architecture (PowerPC to the rest of us). This 90nm version of the e500 adds a floating-point unit and operates at up to 1.5GHz. The new chips are the first PowerQuicc III products to include the Quicc Engine packet processor, which Freescale previously rolled out in its e300-based PowerQuicc II Pro line. The introduction of 8568/8567, which are due to sample in 1Q07, completes the replacement of Freescale's older CPM technology throughout the PowerQuicc line. Other key features of the 8568 include a table-lookup accelerator, a pair of dedicated GbE MACs to supplement the three ports supported by the Quicc Engine, support for eight lanes of Serial RapidIO (SRIO) or PCI Express (or four lanes of each), and a built-in encryption engine. The 8567 omits the two standalone GbE MACs and the look-up accelerator and supports only four lanes of SRIO or PCIe. The Quicc Engine in both parts supports a variety of interfaces, such as Utopia, POS-PHY, T/E, and Ethernet, and a variety of Ethernet, ATM, and PPP protocols. A select group of Freescale partners is available to OEMs seeking custom firmware. With a wealth of I/O options, a programmable data-plane, and a GHz-class CPU, the new PQ3 devices blur the line between access NPU and communications processor. The features that set them apart are their fast Power Architecture CPUs and support for SRIO and PCIe. We expect OEMs, such as mobile infrastructure suppliers, with heavy control-plane requirements and those looking to upgrade an older PowerQuicc-based design to find these processors particularly attractive. --Joe Complete coverage of the MPC8567/68 appears in our upcoming report A Guide to Access Processors. Late last month, Hewlett-Packard announced a major refresh of its ProLiant line of x86 servers including new networking options and features. The most notable addition is a pair of 10GbE multifunction NICs based on chips from startup NetXen. The HP NC510F and NC510C are low-profile PCIe x8 NICs that support one SR and one CX4 port, respectively. Although initially shipping with standard NIC drivers for Linux and Windows, the NC510 NICs will support TCP offload (TOE), iSCSI, and RDMA through future free software upgrades. These features are enabled by NetXen's programmable design, which integrates four custom processors. The downside of NetXen's design is high power dissipation; the NC510 dissipates up to 24W and require a large heatsink with cooling fan ("fansink"). HP's approach with the new NetXen-based products is the same one it has used with GbE NICs based on Broadcom's C-NIC chips (BCM5706/5708). In fact, HP announced support for RDMA on its GbE multifunction server adapters as a part of the larger server refresh. The HP ProLiant Essentials RDMA Pack consists of a Winsock Direct (WSD) provider for the Windows Server 2003 operating system. HP also added support for its message-passing interface (HP-MPI) under Windows Compute Cluster Server. Because TCP Chimney and iSCSI support were already available for Broadcom-based adapters, RDMA support completed the major features of HP's multifunction GbE NICs. The NC510C/F are not HP's first 10GbE NICs, as the company has been shipping Neterion-based PCI-X cards for its Integrity and HP9000 lines for some time. But the new adapters make 10GbE available for the first time in high-volume ProLiant servers. Although it has taken some time, HP has also demonstrated the ability to enable its multifunction NICs with new features over time. If the company can duplicate the success of its Broadcom GbE program with 10GbE partner NetXen, HP could be the first server OEM to support TCP Chimney, iSCSI, and RDMA over a single 10GbE NIC. —Bob Complete
coverage of NetXen's 10GbE NICs and Broadcom's C-NIC chips
appears in our recent report A Guide to Gigabit and 10G Ethernet
Chips. Last week, IBM announced it is sampling two new PowerPC processors. The 750CL, the newest member of the long-running 750 series, uses a 90nm process and 256KB level-two (L2) cache to reduce power dissipation from previous versions while maintaining the same speed of up to 1GHz. The 970GX is similar to the 970FX, a 64-bit PowerPC implementation, but doubles the L2 cache to 1MB. Although these enhanced products show that IBM is still investing in its PowerPC processors, but to significantly improve its market position, the company must develop radically new products with integrated accelerators and peripherals. —Linley Additional
coverage of IBM's 750 and 970 families appears in our new report
A Guide to High-Speed Embedded Processors.
The next seminar in the Linley Tech series will cover Programmable Devices for Network System Design, including high-speed embedded processors and advanced FPGAs. This event will be held on Wednesday, November 1, at the Marriott Hotel in Santa Clara. The complete program for this seminar is now available on our web site. The presentations will include:
Don't miss the opportunity to hear these distinguished technical speakers discussing the latest products and design trends in networking and communications. Get the information you need to choose the right suppliers and to improve your design. Join us at Linley Tech in November. Admission is free to qualified attendees, courtesy of our sponsors: Freescale, AMCC, Cavium, Cswitch, and IBM. As service providers continue to upgrade their broadband and mobile infrastructure, more semiconductor vendors than ever before are targeting the access infrastructure, which extends from the network edge to customer-premises equipment. A Guide to Access Processors has been extensively revised to bring you the latest details on the network processors and NPU suppliers focused on chips serving this growth market. Access network processors are specialized devices for protocol processing, typically operating at speeds of 2Gbps or less. In access equipment, these devices are optimized not so much for raw throughput as for flexible—and predictable-multiprotocol operation. They are often deployed in aggregation equipment such as DSLAMs, multiservice platforms, and mobile infrastructure. Access NPUs integrate a variety of interfaces and are often bundled with a plethora of firmware. The report provides comprehensive coverage of products including Agere APP300, AMCC nP3705 and nP3665, Conexant Columbia II, Freescale PowerQuicc, Intel IXP2350, Wintegra WinPath1 and WinPath2, Ethernity ENET3000, and more. With just one report, you can get the analysis you need to help choose a supplier or partner in this field. We guide you through the maze of access and networking technologies and also detail and compare the various processor products that support these technologies. Order by November 10 to get a special prepublication discount.
For more information on this new edition, visit our web
site.
On October 17, Jag Bolaria, senior analyst with The Linley Group, will chair the Issues Roundtable on Switch Fabrics (aka "Bus Wars") at the AdvancedTCA Summit. Jag has gathered together top technical talent from key companies for a lively discussion on Switch Fabric technology trends. The summit will be held at the Santa Clara Marriott Hotel. For further information, visit the AdvancedTCA Summit web site. To receive The Linley Wire via e-mail, click here
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