The
Linley Wire
Independent
Analysis of the Networking-Silicon Industry
Volume 7, Issue 10
June 1,
2007
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Editor: Linley
Gwennap
Contributors: Bob Wheeler, Jag
Bolaria, Joseph Byrne
In
This Issue
Networking
Silicon Market Share 2006 is now available, bringing you all-new
market share data. Find out who's gaining share and who is losing.
For more information, visit our web
site.
EZchip Discloses 30Gbps and 100Gbps NPUs
During May, EZchip made several significant disclosures regarding
new network processors. In its 1Q07 earnings release, EZchip
revealed it is sampling one version of its NP-3, specifically
the version it codeveloped with Marvell for an unnamed Tier
One customer. Other customers will have to wait for the standard
NP-3, which EZchip says will sample later this year. It is unclear how the two NP-3 versions differ, but the company
has released details on the standard product. Whereas the NP-2
is built at TSMC in a 130nm process, the NP-3 will use a 90nm
process at IBM. And while the NP-2 had two 10Gbps interfaces,
the NP-3 adds a third simultaneously operating 10Gbps port.
As a result, EZchip calls the NP-3 a 30Gbps NPU. The other
significant addition to the NP-3 is OAM offload features.
This week, EZchip disclosed limited details of its NP-4, which
is due to sample some time in 2008. Using 65nm technology,
the NP-4 will be a single-chip 100Gbps NPU with integrated
traffic management. Compared with the NP-3, the NP-4 will add
functions normally handled by a separate fabric-interface chip
(FIC). EZchip says the FIC function will enable system-wide
QoS in designs using standard 10GbE switch fabrics. The NP
4 will include eight 10Gbps ports, 24 GbE ports, and one 100Gbps
port. A single NP-4 should support a variety of designs, including
24xGbE or 4x10GbE line cards as well as a 24xGbE+4x10GbE standalone
configuration.
With
NP-2 revenue ramping, the NP-3 in the hands of a lead customer,
and a 100Gbps NPU under development, EZchip is demonstrating
both business and technology momentum. Meanwhile, Bay is sampling
its Chesapeake 40Gbps NPU/TM, and Xelerated has fresh funding
in hand; both have hinted at future 100Gbps products. Although
the 100Gbps Ethernet standard won't be completed before 2009,
the 100Gbps NPU race is clearly on. —Bob
Additional
coverage of EZchip appears in our report A
Guide to Metro Network Processors.
APP2200
Targets SMB
Leveraging
the network-processor technology it acquired as part of Agere,
LSI last week announced a family of communications
processors,
the APP2200. These highly integrated products combine dual 280MHz
ARM11 CPUs, a pair of packet engines from the APP NPU products,
a flexible encryption engine, Ethernet MACs, and other network
interfaces. The high-end APP2250 is rated at 3Gbps of throughput,
whereas the low-end APP2210 scales down to 300Mbps. Pricing ranges
from over $100 for the 2250 to about $45 (in high volume) for
the 2210. LSI also disclosed the previously unannounced APP200,
which
uses an ARM9 CPU and sells for just $20.
As in other APP products, the packet engines offload the entire
data plane, implementing a flexible classification engine and
a robust traffic manager. As networks transmit a mixed of voice,
video, and data, traffic management becomes more important.
The security engine, apparently licensed from SafeNet,
handles a
variety
of bulk and public-key algorithms and offloads security protocols
from the CPU. IPSec performance ranges from 500Mbps to 1,500Mbps
depending on packet size. This architecture frees the two CPUs
to handle voice encoding, networking management, and high-level
applications. The new chip is scheduled to sample to customers
in August.
The
APP2200 targets the emerging SMB gateway, which combines several
functions such as router, VPN/firewall, VoIP, and
storage. Some
even manage video from surveillance cameras. Merging multiple
functions into one box reduces overall cost but drives up
the CPU requirements.
The dual ARM11 CPUs, combined with extensive hardware offload,
provide horsepower and flexibility for these various functions.
With
this new architecture, LSI will compete directly Freescale's
PowerQuicc. Although the APP2200 can't match Freescale's
fastest processors, it provides plenty of horsepower for
SMB along
with proven security and packet engines. Now, LSI must
build the software
support and the credibility to steal design wins from the
market leader. —Linley
Additional
coverage of the APP family appears in our report A
Guide to Access Processors.
First 10GBase-KR Products
Sample
Last week at Interop, AMCC and Broadcom separately
announced availability of their 10GBase-KR transceivers.
The IEEE recently
approved this new standard (802.3ap) for transferring 10Gbps
serial data over the backplane. The initial target applications
include blade servers and ATCA systems. Each company had
a live demonstration showing the transceiver passing data
at 10Gbps using connectors from Tyco or Molex. Both companies
are currently sampling their KR chips and are in the process
of qualifying them for production.
Broadcom's BCM8071 and AMCC's QT2055 each include equalization
and transmit pre-emphasis, to ensure error free communications
over the backplane. Each device bridges between a XAUI interface
and a 10Gbps serial interface. Each can auto-negotiate operation
at either 1Gbps or 10Gbps and is packaged in a 13mm BGA.
The BCM8071 is manufactured on a 90nm process and has a typical
power dissipation of 1.5W. In contrast, the QT2055 is manufactured
on a 130nm process and has a slightly lower power dissipation
of 1.3W.
AMCC and Broadcom have sampled
the first KR transceivers at about the same time and
with similar features. Each company
has reused in-house technologies to reduce execution risk
and deliver early samples. We expect volume for these products
to ramp in 2008 or later. On the basis of power dissipation,
AMCC's QT2055 has a slight edge—especially in designs
that will use multiple 10Gbps links. Potentially, AMCC could
further reduce power dissipation by migrating its design
to 90nm. On the other hand, Broadcom can promise a roadmap
that integrates the KR transceiver with its popular switch
products—thus simplifying system upgrades. —Jag
See what the vendors had to say about 10G Ethernet
at our recent seminar on High-Speed
Interconnects.
News
in Brief
At Microprocessor Forum last week, AMCC disclosed the first details
of its next-generation Power CPU, code-named Titan. The CPU, codeveloped
with Intrinsity, is slated to achieve 2GHz in a standard 90nm process.
This amazing speed comes in part from Intrinsity's Fast14 technology.
Titan uses a dual-issue, out-of-order architecture but keeps the
pipeline to a modest 11 stages, reducing penalties. AMCC expects
Titan to burn just 2.5W (typical) per CPU, allowing it to be used
in SoC designs with moderate power dissipation. The CPU is designed
to work in dual- and quad-core designs. The first Titan-based products
are scheduled to sample in early 2008. —Linley
Additional
coverage of AMCC's Power processors appears in our report A
Guide to High-Speed Embedded Processors.
Earlier
this month, Iamba Networks announced its GPON eco-system (iGES)
product line. For the OLT, the startup offers the iSL2402 dual-GPON
chip, which is currently sampling. By the end of the year, the
company plans to sample a quad-port GPON controller. For the ONT,
Iamba announced the iSN1000 product line along with a production-ready
system design. The iSN1000 design has been validated for interoperability
with equipment at several carriers. The stealthy startup is only
the second company to sample a complete GPON solution. The level
of completeness has allowed Iamba to get design wins at TEMs and
ODMs. By the end of the year, it should have a product line to
rival BroadLight's. —Jag
Additional
coverage of GPON products appears in our report A
Guide to Broadband Interface Chips.
Linley Tech Seminar: Enterprise and Data Center Networking
On July 18th, The Linley Group will host the next seminar in
its Linley Tech 2007 series. This one-day event in San Jose will
focus
on the technologies driving the future of enterprise and data-center
networks. This seminar is intended for network-equipment vendors,
server OEMs, system designers, service providers, enterprise-network
managers, software developers, press, and the financial community.
This event will feature in-depth presentations on the newest
chips and technologies for switching and server connectivity
from leading
suppliers of OEM products for this market. You won't want to
miss this outstanding lineup of technical presenters, including:
- Michael Kagan, VP of Architecture, Mellanox Technologies
- Steve Pope, CTO, Solarflare Communications
- Alex Dickinson, President and CEO, Luxtera
- Brad Booth, Senior Principal Engineer, AMCC
- Mike
Hui, IP Services Solution Architect, Freescale
- Asif Hazarika, Senior Manager, Fujitsu Microelectronics America
- Ori Aruj,
General Manager North America, Dune Networks
The seminar will open with a presentation from The Linley Group
highlighting market and technology trends and providing
context for later presentations. The remainder of the day
will include
talks and panel discussions covering a broad range of topics
such as 10GbE switching, 10GbE backplanes, optical interconnects,
and
application-aware networking. Full details of the program
will be announced shortly. Register now! Attendance is free
to qualified
attendees that pre-register.
This
event is sponsored by Freescale, AMCC, Solarflare,
Luxtera, Mellanox, Dune, Cavium, and Fujitsu Microelectronics.
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