Editor: Linley
Gwennap In This Issue
Our new report A Guide to High-Speed Embedded Processors is now available for immediate delivery. Get in-depth analysis of all the newest processors, including Intel Atom, Via Nano, and Marvell Shiva. For more information, visit our web site. Xelerated Turbocharges NPU Line Today, Xelerated announced a family of third-generation products expected to sample in 4Q08. The HX300 family includes variants spanning fiber-access to 100G Ethernet designs. All the chips use a programmable pipeline for packet processing based on that of Xelerated’s shipping X11 network processor. The HX320 handles the same functions as an X11, only with twice the GbE and 10GbE port density. The HX330 is the first Xelerated NPU with an egress traffic manager (TM). Intended for access designs, the HX310 integrates a shared-memory switch, turning the NPU into a single-chip programmable Ethernet switch. The HX310/320/330 all include 52xGbE ports with SGMII and 8x10GbE ports. In metro line cards, the HX320 replaces a pair of X11 devices, supporting 48xGbE and 4x10GbE with a single chip. Customers who want egress traffic management can instead use the HX330, which adds a hierarchical TM that buffers packets in external DRAM. A special HX320 variant, the HX326, handles 100GbE designs using a single Interlaken interface with up to 24 lanes. In a 100GbE line card, a pair of HX326 devices handles ingress and egress traffic, respectively, connected with an external MAC using Interlaken. Unlike the HX320/HX330, the HX310 does not require or support any external memories. Externally, the chip looks more like a typical GbE switch chip from Broadcom or Marvell. But internally, the HX310 contains the same programmable pipeline found in the HX320/330. In the immature PON and active-Ethernet segments, this programmability allows customers to adapt to new standards or carrier-specific feature requirements. One HX310 device can service a 16xGPON line card, connecting to GPON controller chips using 2.5Gbps operation on its SGMII ports. For active Ethernet, a single HX310 forms the core of a 48xGbE+4x10GbE pizza box. With its third-generation design, Xelerated is greatly broadening the applications for its products. The HX330 fills a hole in the company’s offering with the additional of an egress TM. The HX310 defines a new class of chips, competing with combinations of Broadcom or Marvell switch chips and EZchip NPUs or Altera/Xilinx FPGAs. Considering the significant new functions the HX310/330 incorporate, delivering fully functional samples on schedule will be a major challenge. Assuming Xelerated can deliver, the new chips should significantly increase the company’s design wins. —Bob Additional coverage of Xelerated appears in our report A Guide to Network Processors. Last week, AMCC announced two new additions to its PowerPC 460 processor family. The 460SX targets storage applications, while the 460GTx targets networking applications. Both are expected to reach speeds of 1.4GHz, although initial samples in 3Q08 will be at 1.2GHz. The 460SX is an upgrade to the older 440SP. The new device offers a faster PowerPC CPU and faster (5Gbps) PCI Express links. The chip provides two x8 PCIe ports (one can be split into 2x4) along with an internal switch that can route data among these ports and/or DRAM without CPU intervention. Internal engines perform RAID5/RAID6 checksums, AES/3DES (for iSCSI), and IEEE 1619 encryption (data at rest), all without CPU overhead. The chip also includes four Gigabit Ethernet MACs. The 460SX offers a unique combination of CPU, offload, and I/O performance. It supports more PCIe bandwidth than any other embedded processor; these ports can support a large number of FC, SAS, or SATA drives via external controllers. The chip can also be used as a storage controller on a PCIe card. AMCC did not announce any benchmarks, but the fast CPU plus the RAID/encryption engines should provide very good storage performance. The 460GTx contains the same fast CPU and 512KB of cache, but it has only IPSec acceleration and no RAID6 capability. It provides a single x8 or two x4 PCIe ports, also at 5Gbps (Gen 2). It offers more performance than AMCC’s older 460GT, but it costs more and will be in production about a year later than the 460GT. The 460GTx offers strong performance for control-plane and other single-threaded networking applications. —Linley Complete coverage of AMCC’s 460SX and 460GTx appears in our new report A Guide to High-Speed Embedded Processors. Yesterday, SafeNet announced IP cores plus a software toolkit that form a comprehensive solution for MACSec link-layer security. For the 802.1AE fast path, SafeNet’s EIP-160 flow-through engine handles classification and key lookup, MACSec header processing, and AES-GCM encryption. SafeNet rates the EIP-160 at 20Gbps for 64-byte packets at 250MHz, which should be easily achieved in mainstream 130nm technology. The QuickSec/MACsec software supports draft-802.1X-REV authentication using EAP-TLS or pre-shared keys and provides an API to the EIP-160 core. Although AES-GCM encryption IP is available from multiple vendors, SafeNet is the first to offer a complete solution including protocol processing. As has been the case with SafeNet’s IPSec IP, this new MACSec offering should be attractive to chip vendors and OEMs that lack in-house security expertise. —Bob SafeNet will give a presentation on MACSec at our Embedded Network Security Design seminar on July 16 in San Jose. For more information or to register, click here. Yesterday, Pericom introduced its SlimLine family of PCI Express devices. These devices use thin packages and are optimized for low power dissipation. Consisting of two switches and one reversible PCI-to-PCIe bridge, the SlimLine family targets space-constrained applications such as wireless access points, notebooks, and printers. The products include a four-port switch and a three-port switch; each port is a single lane. The company has integrated power-savings modes that can reduce power dissipation by up to 30% compared with its older products. To further reduce power dissipation, designers can adjust the drive current and pre-emphasis. The company is currently offering samples, evaluation boards, and developments kits for each of these products. —Jag Additional coverage of Pericom’s PCI Express products appears in our new report A Guide to High-Speed Interconnects. Last week, NetLogic announced the industry’s first quad-port 10G Ethernet PHY for SFP+ and backplane applications. The NLP2040 is designed for use with SFP+ modules, while the NLP2030 is designed to drive backplanes. The NLP2040 integrates EDC (electronic dispersion compensation), which NetLogic validated in its earlier single- and dual-PHY products. The NLP2030 integrates FEC (forward error correction) to enable acceptable performance over the backplane. To support increasing processor performance and increasing communication bandwidth requirements, OEMs are developing greater density 10GbE line cards. NetLogic has taken an early lead in offering a 4x10GbE PHY, which is a critical component of high-density 10GbE line cards. —Jag Additional coverage of NetLogic’s Ethernet products appears in our report A Guide to Ethernet Switch and PHY Chips.
Join us on July 16 for a Linley Tech seminar on designing security into networking systems. The seminar is organized to help engineers or engineering managers who are responsible for designing network-security equipment or designing security into switch/routers or other equipment. The program features technical presentations from leading suppliers of products for this market, including Freescale, AMCC, Netronome, LSI, Cavium, SafeNet, and cPacket. Bob Wheeler, senior analyst at The Linley Group, will begin the program with an overview of network-security technologies (e.g., VPN, DoS, firewall, IDS/IPS, antivirus), market trends, and silicon trends. The remainder of the day will include talks and panel discussions covering a broad range of security-design topics including VPN/firewall integration, high-speed encryption and MACSec, and deep-packet inspection. To get an idea of what you can expect, see last year’s detailed program. Further details will be announced soon. This Linley Tech seminar will be held at the DoubleTree Hotel in San Jose. The seminar is intended for system designers, OEMs, network-equipment vendors, service providers, security-software vendors, press, and the financial community. Attendance is free to qualified attendees who register by July 11. This event is sponsored by Freescale, AMCC, Netronome, LSI, SafeNet, Cavium, and cPacket. For more information, visit our web site.
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