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A Guide to Network Processors

15th Edition

Published December 2014

Authors: Bob Wheeler and Loring Wirbel

Single License: $3,995 (single copy, one user)
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The Definitive Report on Network Processing

NPUs have become a critical ingredient of carrier-equipment designs. These chips appear in designs from leading OEMs spanning many applications from wireless backhaul to Carrier-Ethernet switch/routers. This broad adoption has created a merchant market that exceeded $300 million in 2013, large enough to sustain multiple vendors. Following years of market growth and vendor consolidation, only a single NPU startup remains, while all other active vendors are public companies.

Metro-class NPUs are scaling to 200Gbps and beyond to support high-density line cards and 100G Ethernet. Some remain focused on Layer 2/3 forwarding, whereas others are addressing flow processing at Layers 4 through 7. Access infrastructure is migrating to Ethernet and IP backhaul while data rates for both wireline and wireless networks continue to climb. These factors are driving the need for new access NPUs with throughputs of 10Gbps or more. A "Guide to Network Processors" provides a single comprehensive report covering NPUs spanning data rates from 10Gbps to 400Gbps.

This report covers customer-programmable NPUs for access and Carrier Ethernet designs, including: Broadcom’s XGS Core and Dune lines, EZchip’s NP and NPS lines, Netronome's NFP, Marvell’s (Xelerated's) HX and AX lines, and PMC-Sierra’s (Wintegra's) WinPath. This report also includes coverage of search coprocessors, such as Broadcom’s (NetLogic’s) KBP products, Cavium’s Neuron Search, and Marvell’s Questflo, which are often used with high-end NPUs.

Only The Linley Group follows this market closely enough to give you the complete picture. Which vendors are in this business for the long haul? How do the latest products stack up? What is the market outlook for merchant NPUs? "A Guide to Network Processors" is the result more than a decade of research that cannot be duplicated. If you are interested in following this strategic standard-product segment, you have located the definitive source.

Get Facts, Not Fiction

This report cuts through the vendor hype and gives you the solid information you need to understand this market. "A Guide to Network Processors" analyzes each vendor and each product, probes their strengths and weaknesses, then presents key details in a consistent, easy to compare fashion. For those less familiar with this combination of networking and CPU design, the report includes several introductory chapters that define and describe basic concepts and key technologies.

The Linley Group is the most recognized and respected name for technology and market analysis of network processors. Don't be fooled by weak overviews written by market analysts who really don't understand how a network processor works. The "Guide" provides a unique combination of business and technology savvy from the leading analysts in this market. Bob Wheeler and Loring Wirbel use their long experience in the networking world to analyze these devices. Together, the two authors ignore the fiction and provide the real story on each NPU vendor and its products.

Don't miss the latest information on this important market. Order now.

This report is written for:

  • Engineers who are designing carrier-networking equipment and need to select a network processor (NPU)
  • Network architects at carriers and service providers who need to get up to speed on this technology
  • Marketing and engineering staff at companies that sell NPU products or partner with NPU vendors
  • Technology professionals who wish an introduction to carrier-networking and network processors
  • Financial analysts who desire a detailed analysis and comparison of NPU companies and their chances of success
  • Universities and research institutes that need a vendor-neutral introduction to this market and technology

What's New in This Edition

Updates to the 15th Edition of "A Guide to Network Processors"

"A Guide to Network Processors" has been extensively updated to include the latest disclosures from NPU vendors as well as 2013 market data.

Here are some of the many changes you will find:

  • New quantitative market data, including:
    • Preliminary NPU vendor market shares for 2014
    • Preliminary search coprocessor vendor market shares for 2014
    • Revised forecasts for merchant NPUs and search coprocessors through 2019
  • Coverage of Marvell’s new Sharpnose NPUs and Questflo search coprocessor
  • Coverage of new Renesas 80Mb TCAM
  • Extensive updates to company-background information, roadmaps, and analysis for major NPU vendors
  • Revised and updated tutorials

All Tier One networking and communications OEMs use NPUs in a range of systems, including edge/services routers, Carrier Ethernet switch/ routers (CESRs), optical-transport platforms, and wireless and broadband infrastructure. Many of these OEMs continue to invest in internal NPUs, which limit the adoption of merchant products. But most of those with internally developed NPUs still use merchant NPUs in some designs.

Because semiconductors are subject to occasional inventory corrections, the merchant-NPU market displayed a somewhat volatile growth rate in the last decade. This trend continued through the recession of 2009, followed by an upswing in 2010. What followed, however, was an unprecedented four-year decline in 2011–2014. This decline was due to several factors including an initial inventory correction followed by weak macroeconomic conditions and falling revenue from the access market. Looking forward, we expect the NPU market will return to significant growth in 2017 as the access segment becomes a smaller contributor and high-end NPUs continue to grow.

Despite being smaller than most competitors, EZchip is the leading supplier of high-end merchant NPUs. The company is shipping multiple product generations including the 200Gbps NP-5, which combines a customer-programmable packet processor, traffic manager, and Ethernet MACs. It has worked with Marvell to supply special versions of its NPUs to Cisco, which primarily uses them in the ASR 9000 router. EZchip is developing a new line of NPUs, called NPS, that handle Layer 4–7 features and promise easier programming than traditional NPUs.

In the access market, PMC-Sierra is the leading vendor. The company entered the NPU market in late 2010 by acquiring Wintegra, which had become a leading vendor of access NPUs because of its flexible architecture and complete data-plane software. Since the acquisition, PMC has increasingly focused on wireless-backhaul designs, where support for legacy protocols continues to differentiate the WinPath NPUs from Ethernet-only alternatives. In 2014, PMC reached production with WinPath4, which scales performance to 40Gbps.

With its BCM88038, Broadcom shipped the industry’s first full-duplex 100Gbps NPU. The company combines this customer-programmable NPU with its 200Gbps configurable traffic manager, switch fabric, and search coprocessors to offer a packet-processing solution that is more complete than any competitor’s. Customers can combine these components in 400Gbps line cards or use them independently in different designs. Broadcom also provides ASIC services to OEMs wishing to develop in-house NPUs, such as Alcatel-Lucent with its FP3. For access and aggregation applications, it instead offers configurable Carrier Ethernet switch chips in its popular StrataXGS line.

In addition to its manufacturing role with EZchip, Marvell supplies high-end NPUs of its own design, which come from the company’s acquisition of NPU startup Xelerated. In late 2013, it sampled the HX41xx, which offers throughputs up to 400Gbps. The derivative AX line delivers programmable packet processing for access- and aggregation-switch designs. Marvell has also added traffic-management technology from its NPUs to Prestera configurable Carrier Ethernet switch chips, which address lower-cost access designs.

Netronome is now the only privately held company developing NPU silicon. Rather than competing for carrier designs, it principally targets security appliances and other data-center applications. The company started to generate NPU revenue in 2011 with initial shipments of its 40Gbps NFP-3240. In 2014, Netronome sampled the NFP-6xxx, its next-generation NPU that scales throughput to 200Gbps. Designed for stateful flow processing, the NFP devices are unique in their ability to perform advanced services such as IPSec, SSL, firewall/NAT, load balancing, and deep packet inspection (DPI).

Also referred to as TCAMs or network search engines (NSEs), search coprocessors offload NPUs by performing lookup functions. Cisco and other leading OEMs combine search coprocessors with both merchant and internal NPUs, resulting in a merchant search-coprocessor market about two-thirds the size of the merchant-NPU market. As with NPUs, some OEMs also possess proprietary search designs.

Through its NetLogic acquisition, Broadcom became the dominant supplier of search coprocessors, which it calls knowledge-based processors (KBPs). Its traditional competitor is Renesas, which primarily supplies TCAMs to Cisco. Two new entrants, Cavium and Marvell, hope to compete with Broadcom using algorithmic implementations that promise to reduce power and cost. Depending on their application, OEMs now have at least two vendors to choose from.

List of Figures
List of Tables
About the Authors
About the Publisher
Preface
Executive Summary
1 Introduction to Carrier Networks
Network Types and Topologies
Metro-Area Networks (MANs)
Wireline Access
Wireless Access
Equipment Types
Metro Platforms
Wireline Access Infrastructure
Wireless Access Infrastructure
2 Carrier-Network Technology
Network Layers and the OSI Model
Layers 3–7
Layers 1 and 2
Interaction Among Layers
Network Protocol Details
Ethernet
PPP
ATM
Multiprotocol Label Switching (MPLS)
Sonet/SDH
OTN
IP Multicasting
TDM Emulation
Timing Synchronization
Ethernet OAM and Protection Switching
HDLC and Frame Relay
Carrier Ethernet Services
Packet-Processing Pipeline
Control and Data Planes
Parsing
Classification
Forwarding
Modification
Network Paths and Quality of Service
Traffic Management
Policing and Shaping
Congestion Management
Scheduling
Hierarchical Traffic Management
Network and I/O Interfaces
MII, XAUI, and Derivatives
Interlaken and Interlaken Look-Aside
OIF/NPF LA 1
Utopia, POS-PHY, SPI
PCI Express
Chassis and Board Standards
3 Network Processors and Search Coprocessors
What Is a Network Processor?
What Is Not a Network Processor?
NPU Common Characteristics
Microarchitecture Variations
Encryption Engines
Fixed-Function Versus Programmable
Network Interfaces
Memory Interfaces
Host Interface
Software Considerations
Vendor Programming Versus Customer Programming
Search Coprocessors
What Is a Search Coprocessor?
Applications
Architecture and Common Characteristics
4 Market Size and Trends
Merchant-NPU Market Size and Segmentation
NPU Market Share by Vendor
NPU Market Forecast
Search-Coprocessor Market
Technology Trends
OEM-Proprietary NPUs
Alcatel-Lucent FlexPath
Cisco QuantumFlow Processor and nPower X1
Ericsson SNP-4000
Huawei Solar
Juniper Junos Trio
NPU Technology Trends
Software-Defined Networking
Stateful Network Processors
Multicore Processors Versus NPUs
FPGAs Versus NPUs
5 Broadcom
Company Background
Key Features and Performance
Packet Processors
Search Coprocessors
Internal Architecture
Packet Processors
Search Coprocessors
System Design
Development Tools
Product Roadmap
Conclusions
6 EZchip
Company Background
Key Features and Performance
Internal Architecture
NP and NPA
NPS
System Design
Development Tools
Product Roadmap
Conclusions
7 Marvell
Company Background
Key Features and Performance
Packet Processors
Search Coprocessors
Internal Architecture
Packet Processors
Search Coprocessors
System Design
Development Tools
Product Roadmap
Conclusions
8 Netronome
Company Background
Key Features and Performance
Internal Architecture
System Design
Development Tools
Product Roadmap
Conclusions
9 PMC-Sierra
Company Background
Key Features and Performance
Internal Architecture
System Design
Development Tools
Conclusions
10 Search-Coprocessor Vendors
Cavium
Company Background
Key Features and Performance
Conclusions
Renesas
XeL Technology
Company Background
Key Features and Performance
Conclusions
11 Legacy Vendors
AppliedMicro
Intel
12 Comparing NPUs
Access NPUs
Key Differentiators
200Gbps-and-Above NPUs
Key Differentiators
13 Conclusions
NPU-Vendor Outlook
EZchip
Broadcom
Marvell
Netronome
PMC-Sierra
Closing Thoughts
Appendix: Further Reading
Index
Figure 1‑1. Generic network architecture.
Figure 1‑2. Wireline access networks.
Figure 1‑3. 3GPP Release 8 LTE network architecture.
Figure 2‑1. OSI layer traversal example.
Figure 2‑2. ATM protocol stack.
Figure 2‑3. MPLS encapsulation.
Figure 2‑4. VPLS switch conceptual model.
Figure 2‑5. Control and data planes.
Figure 2‑6. Hierarchical traffic-management example.
Figure 2‑7. Standard line-card interfaces.
Figure 3‑1. Block diagram of a typical NPU.
Figure 3‑2. Hybrid search-engine architecture.
Figure 4‑1. NPU revenue by application segment, 2014.
Figure 4‑2. Preliminary market share of merchant NPUs by revenue, 2014.
Figure 4‑3. Merchant NPU market forecast, 2013–2019.
Figure 4‑4. Search-coprocessor market forecast, 2013–2019.
Figure 5‑1. Block diagram of Broadcom BCM8803x NPU.
Figure 5‑2. Block diagram of Broadcom BCM88650 device.
Figure 5-3. Block diagram of Broadcom NLA12k KBP.
Figure 5‑4. Block diagram of a Broadcom-based 400Gbps line card.
Figure 6‑1. Block diagram of EZchip NP‑5.
Figure 6‑2. Block diagram of NPS network-processing cluster (NPC).
Figure 6‑3. Block diagram of EZchip NPS‑400.
Figure 6‑4. 100GbE line card using EZchip NP-5.
Figure 7‑1. Marvell HX/AX PISC architecture.
Figure 7‑2. Simplified block diagram of Marvell HX41xx.
Figure 7‑3. Block diagram of Marvell 100GbE line card.
Figure 8‑1. Conceptual block diagram of Netronome NFP-6xxx processor.
Figure 8‑2. Block diagram of Netronome NFP-6xxx appliance.
Figure 9‑1. Block diagram of PMC-Sierra WinPath4.
Figure 9‑2. Wireless-backhaul aggregator based on WinPath4 and UFE4.
Figure 9‑3. Microwave backhaul using WinPath3.
Table 2‑1. OSI reference model.
Table 2‑2. Bandwidths of common interfaces.
Table 2‑3. ITU-T standards for ATM adaptation layers.
Table 4‑1. Worldwide revenue of network-processor vendors.
Table 4‑2. Worldwide revenue of search-coprocessor vendors.
Table 5‑1. Key parameters for Broadcom NPU and TM devices.
Table 5‑2. Key parameters for Broadcom KBP devices.
Table 6‑1. Key parameters for EZchip NPUs.
Table 7‑1. Key parameters for selected Marvell NPUs.
Table 8‑1. Key parameters for Netronome NFP-3240 and NFP-6xxx.
Table 9‑1. Key parameters for PMC-Sierra WinPath devices.
Table 9‑2. WinPath protocol and interworking support.
Table 10‑1. Key parameters for XeL ISE and ISP search coprocessors.
Table 11‑1. Key parameters for selected AppliedMicro nP devices.
Table 11‑2. Status of Intel and former LSI NPUs.
Table 12‑1. Comparison of access NPUs.
Table 12‑2. Comparison of 200Gbps-and-above NPUs.

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