The number and resolution of image sensors continues to increase in mobile, AR/VR, automotive, drone, mobile, and robotics platforms, which also have a mix of different types of sensors on top of image sensors. These sensors require highly programmable, high-performance and low power vision and AI DSPs. The market also needs different performance points to address various use cases. This presentation will highlight trends in these markets and disclose new products in the Tensilica Vision and AI DSP line.

Tremendous progress has been made in the last year towards bringing RISC-V vector (RVV) extensions to market in both hardware implementations and supporting compiler technologies. SiFive has gone a step further with the inclusion of new vector operations specifically tuned for the acceleration of common neural networking tasks.  We will demonstrate how these new instructions, integrated with a multicore, Linux-capable, dual-issue microarchitecture, with up to 256b wide vectors, and bundled with TensorFlow Lite support, are well-suited for high-performance, low-power inference applications

Achieving high performance and power efficiency for AI inference at the edge requires maintaining high chip utilization even with a batch size of 1. This presentation will cover how Edgecortix’s reconfigurable Dynamic Neural Accelerator (DNA) IP scales from a few TOPS to more than 50 TOPS, while maintaining high utilization, power efficiency and low latency regardless of workload. We will also outline how our MERA dataflow compiler complements the IP and enables seamless machine learning inference with DNA-enabled systems on chip.

In this presentation, we will discuss AI inference solutions for power constrained applications, such as edge gateways, networking towers, and medical imaging devices. We will begin with the set of considerations for hardware deployment, as these applications have lower thermal constraints and usually do not have space for a full size PCIe card. This will lead into a brief overview of the M.2 form factor, and we will then talk about the role of an M.2 inference accelerator in the system designs for such applications.

The Cloud AI 100 accelerator offers leadership class performance and power efficiency across many applications ranging from datacenter to edge deployment. This talk will discuss Qualcomm’s comprehensive offering of commercial software tools for integration and deployment in production settings. It will also include new benchmark data and disclose how performance scales using multiple accelerators.