Linley Fall Processor Conference 2019

October 23 - 24, 2019
Hyatt Regency, Santa Clara, CA

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The Linley Fall Processor Conference will be held on October 23 - 24, 2019 at the Hyatt Regency Hotel, Santa Clara, CA. This two-day conference features technical presentations addressing processors and IP cores for AI applications, embedded, data center, automotive, IoT, and communications. As the industry's premier processor event we are pleased to be bringing you a number of new product announcements. In addition to more than 25 technical presentations by experts from the companies leading the industry, the conference program will include a keynote session covering the latest market, technology, equipment-design, and silicon trends; also featured will be an AI-focused keynote from Facebook.

The Linley Fall Processor Conference includes presentations on the latest processor chips, processor IP and other technology required for the following applications.

  • Data Center Technologies
  • AI at the Edge
  • Accelerating AI SoCs
  • AI in the Data Center
  • SoCs for Edge Devices
  • AI for IoT Devices
  • Security 
  • AI in Automotive
  • Plus other related technologies

Principal Analyst Linley Gwennap will open the conference with his keynote: Accelerating AI from Cloud to Edge. The second day will feature a keynote from Misha Smelyanskiy of Facebook: Challenges and Opportunities of Architecting AI Systems at Data-Center Scale.

The rest of the program will feature the following speakers and talks:

Scaling AI Training Systems with the Gaudi Processor
Eitan Medina, Chief Business Officer, Habana

Using Industry-Standard Techniques to Accelerate AI Software
Andrew Richards, CEO, Codeplay

Practical Machine Learning at the Extreme Edge
Semir Haddad, Sr Director, Product Marketing, Eta Compute

NeuronFlow: A New Computational Paradigm for Edge Processing
Jonathan Tapson, Chief Scientific Officer, GrAI Matter Labs

A Neuromorphic Processor for Next-Generation AI
Mike Davies, Director, Neuromorphic Computing Lab, Intel Labs

Machine Learning on a Tiny Low-Power FPGA
Hoon Choi, Fellow, R&D, Lattice Semiconductor

Introducing Akida: An Event-Based Processor
Anil Mankar, Chief Development Officer, Brainchip

Efficiency at Scale – 4K Image Processing in Edge Devices
Paul Master, CTO and cofounder, Cornami

Designing a GPU for the 5G Era
Kristof Beets, Senior Director of Product Management & Technology Marketing, PowerVR Graphics, Imagination

Server Processors Require Targeted Application Differentiation
Gopal Hegde, VP & GM, Server Processor Business Unit, Marvell

AI Inference at the Edge–Recent Trends and Solutions
Lazaar Louis, Senior Director, Cadence

Delivering Scaled-Up ML Performance for Mobile, Embedded, and Automotive
Raviraj Mahatme, Sr Product Manager, ML Group, Arm

A New Generation of Advanced AI/Floating-Point DSPs
Graham Wilson, Senior Product Marketing Manager, Synopsys

The SiFive Open Secure Platform Architecture
Dany Nativel, Security Director, SiFive

Security for AI Applications
Neeraj Paliwal, VP of Cryptography Products, Rambus

Enabling Smarter Security on SmartNIC
Sakir Sezer, CTO, Titan IC

AI and Vision Processor for Camera-Based Automotive Use Cases
Yair Siegel, Director of Marketing, CEVA

Integrating AI Accelerators into Automotive SoCs with Functional Safety
JP Loison, Corporate Application Engineer, ArterisIP

A Processor for 5G Open RAN Systems
Toby Foster, Senior Product Marketing Manager, NXP

Introducing Intel Tremont Microarchitecture
Stephen Robinson, Senior Principal Engineer – Tremont Architecture, Intel

Scalable IP for High-Performance Workloads SoC Design 
Yunsup Lee, CTO, SiFive

The Next Level of Performance and Energy-Efficient Edge Computing
Simon Craske, Lead Embedded Architect and Fellow, Arm

Edge Inference Architecture for High Throughput at Low Power and Low Cost
Cheng Wang, Sr. VP, Software, Architecture, Engineering, Flex Logix

A Graph-Based Dataflow Architecture for Executing Neural Networks
Dave Fick, CTO and founder, Mythic

A New Generation of Processors and SmartNICs
Kevin Deierling, Sr. Vice President of Marketing, Mellanox

Memory in the New Era of Compute
Craig McGowan, Sr. Business Development Manager, Compute & Networking Business, Micron

Next-Generation FPGAs for Accelerating Compute, Network, and Storage Workloads
Manoj Roge, Vice President of Strategic Product Planning, Achronix

Bringing Native AI Processing to the Edge
Chien-Ping Lu, CTO, NovuMind

The conference is targeted at chip designers, system designers, equipment vendors, OEM/ODMs, service providers, press, and the financial community.

The conference includes:

  • Sponsor exhibits and demos
  • Evening networking reception on the first day
  • Raffles by The Linley Group
  • Hosted speaker tables at lunch (meet the presenters)
  • Free parking
  • Continental breakfasts and gourmet lunches
  • Free Wi-Fi

To keep informed about this and other upcoming events, please subscribe to the Linley Newsletter, our free newsletter.

Please contact us for information on sponsorship opportunities.

Location: Hyatt Regency Hotel, Santa Clara, CA


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