Linley Fall Processor Conference 2020

October 20-22 and 27-29, 2020 (All Times Pacific)

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For more than a decade, The Linley Group has delivered the industry’s premier processor conference. This year, the Linley Fall Processor Conference will feature virtual presentations that run half days on October 20-22 and 27-29, 2020. As you’ve come to expect from our past conferences, we’ll feature the same high-quality technical content while enabling attendees from around the world to participate in the forum via live-stream.

Presentations will address processors and IP cores for AI applications, embedded, data center, automotive, and communications. Attendees will be able to view live-streamed presentations and interact with the speakers during Q&A, breakout sessions, or scheduled one-on-one meetings.

Analyst and Industry Keynotes

Linley Gwennap, principal analyst, The Linley Group, will open the conference with an overview of the latest market, technologies, equipment-design, and silicon trends. We’ll also feature a keynote from an industry leader to be announced soon.

In-Depth Technical Sessions

Unlike many conferences, we ensure that the presentations deliver real technical content, not marketing hype. We’re the conference of choice for many companies who announce new products or make technology disclosures.

The program will feature more than 30 talks and panel discussions covering a broad range of topics such as the following:

· AI in Edge Devices · Advancing Cloud AI
· Vector-Processing Cores · Automotive Processor Design
· Heterogenous Computing · The New Infrastructure Edge
· SoC Design · Security
· In-Memory Compute · Other related technologies

          Scroll down for a complete list of speakers and talks

Why Attend

Get live-streamed presentations and interact with the speakers on the latest disclosures about the industry products and trends that matter to your business. The presentations will be held half days on Tuesday – Thursday spread across two weeks to accommodate attendee work schedules. Breakout sessions and 1:1 meetings will follow each day’s sessions.

Free Admission

We offer free admission to qualified registrants making it easy to participate. The conference is intended for chip designers, system designers, equipment vendors, OEM/ODMs, service providers, press, and the financial community.

For an idea of what you can expect from the technical program, view the agenda from our virtual Spring Processor Conference.

Live Interaction

To maximize your networking opportunities, in light of current restrictions on physical meetings, we offer the following options.

Sponsor Breakout Sessions – attendees can interact directly with speakers and technical representatives from the presenting companies. In addition to opportunities for live Q&A and further discussions, sponsors may also provide demos, or present additional material.

One-on-One Meetings – schedule individual meetings with presenters/technical representatives for private in-depth discussions.

You won't want to miss these outstanding speakers and presentations:

Keynote: Application-Specific Accelerators Extend Moore’s Law
Linley Gwennap, Principal Analyst, The Linley Group

Keynote: What TinyML Needs from Hardware
Pete Warden, Technical Lead for TensorFlow Micro, Google

A Low-Cost AI-Inference Accelerator PCIe Board Under 20W
Cheng Wang, Sr. VP, Software, Architecture, Engineering, Flex Logix

Scalable Multicore Inference Engine for Efficient Compute at 100 TOPS
John Rayfield, Chief Technical Officer, Imagination

Graphics, Compute & AI Extensions Based on the RISC-V ISA
Iakovos Stamoulis, Director Engineering Management, Think Silicon

Designing Smarter, Not Smaller AI Chips with Innovative Power/Performance
Hiren Majmudar, VP and General Manager, Computing Business Unit, GlobalFoundries

Extending AI SoC Design Possibilities Through Linux-Capable Vector Processors
Krste Asanović, Cofounder & Chief Architect, SiFive

A RISC-V OOO Vector Processor
Thang Tran, Principal Engineer, Andes Technology

Addressing 5G Intelligent RAN Using a Dynamically Multithreaded Vector DSP
Nir Shapira, Business Development Director, CEVA

Delivering Machine Learning at Scale
Dennis Abts, Chief Architect, Groq

Relegating the Important Stuff to the Compiler
Ljubisa Bajic, CEO and Lead Architect, Tenstorrent

Software for AI Everywhere
Wei Li, Chief Architect for Machine Learning Software, Intel

Domain-Specific Architectures Enable Highly Efficient Deep Learning at the Edge
Avi Baum, CTO, Hailo Technologies

Architecting Safe and Secure Solutions for Autonomous Vehicles
Fergus Casey, R&D Director, Synopsys

Scalable, High-Performance Processing for Next-Generation Autonomous Systems
Srikanth Rengarajan, Manager Automotive IP, North American Partners, Arm

Breaking Out of the HSM Box
Ben Levine, Head of Product, Security Solutions Business Unit, Marvell

End-to-End Supply Chain Protection with Dynamic Trust
Srirama (Shyam) Chandra, Security System Architect, Lattice Semiconductor

Next-Generation Machine-Learning Algorithms for Privacy-Preserving Neural Networks
Paul Master, CTO and cofounder, Cornami

Software Optimization of High-Performance x86 with Integrated AI Coprocessor
Mike Thomson, CPU, Neural and Performance Engineer, Centaur Technology

A New FPGA Architecture Optimized for AI Acceleration
Martin Langhammer, Sr. Principal Engineer, Intel

Integrated Training and Inference Solution for AI at the Edge
Moshe Mishali, CTO and Cofounder, Deep AI 

An AI inference Accelerator with High Throughput/mm2 for Megapixel Models
Cheng Wang, Sr. VP, Software, Architecture, Engineering, Flex Logix

Using a Machine-Learning SDK to Boost Performance/Watt in Edge-AI Systems
Kavitha Prasad, VP of Systems Solutions, SiMa.ai

Edge-AI Processor IP Solutions for a Broad Market
Pulin Desai, Director Vision and AI Product Marketing, Cadence

A New Microprocessor Class for Data-Centric Computing
Pradeep Sindhu, Cofounder and CEO, Fungible

Massive Edge Computing Opportunity and the Fourth FPGA Wave
Manoj Roge, VP Strategic Planning & Business Development, Achronix

A High-Performance Infrastructure Processor to Support the Network Transformation
Wilson Snyder, Distinguished Architect, Marvell

Creating a RISC-V PC Ecosystem for Linux Application Development
Yunsup Lee, CTO, SiFive

Mobile CPUs Unlock the Novel Devices of Tomorrow
Stefan Rosinger, Director of Product Marketing, Arm

A Flexible Multiprotocol Cache Coherent Network-on-Chip (NoC) for Heterogeneous SoCs
Michael Frank, Fellow and Chief Architect, Arteris IP

An Associative Processing Structure Challenges Von Neumann Architecture
Bob Haig, Director of Product Management, GSI Technology and Dan Ilan, Hardware Architect, GSI Technology

At-Memory Computation: A Transformative Compute Architecture for Inference Acceleration
Robert Beachler, VP of Product, Untether AI

A General-Purpose AI Processor for Micro Edge Applications
GP Singh, CEO, Ambient Scientific

A Neuromorphic Processor for Power Efficient Edge AI Applications
Anil Mankar, Chief Development Officer, BrainChip

 

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