Linley Tech Processor Conference 2011
Focusing on Networking and Communications
Held October 5-6, 2011

» Events  |  Event Info  |  Agenda Day One  |  Agenda Day Two

Proceedings

Proceedings are available for FREE. Everyone is eligible.
The documents below are password-protected. You MUST submit the Proceedings Request Form (see below) to request the access code.

Step 1. Complete the Proceedings Request Form to get an access code required to open any of the Presentations below.
Step 2. You will receive an email from us within 24 hours with the access code after you complete the Proceedings Request Form.
Step 3. Click on the PDF icons below to download presentations.  After download, you will be asked for the access code to open each presentation.

You will not be able to open the presentations until you complete the Proceedings Request Form.


Session 1: Keynotes

State of the Processor
Linley Gwennap, Principal Analyst, The Linley Group

.9 MB

Session 2: Processors for Base Stations

A New Multicarrier, 150Mbps Small-Cell 4G Base Station SoC
YJ Kim, Cavium

Multicore Solutions for Data-Plane Challenges in 4G/LTE Networks and Network Security
Dilip Ramachandran, NetLogic Microsystems

3.8 MB

Session 3: Data-Plane Software

Network User Plane Architectures on Multicore: Trends & Solutions
Srini Addepalli, Freescale

Extracting the Maximum System-Level Performance from Multicore Processors
Eric Carmès, 6WIND

Using Intel Processors for Data-Plane Processing
Rajesh Gadiyar, Intel

3.8 MB

Session 4: Data-Plane Processing

Solving Challenges in All-IP Networks
David Sonnier, LSI

NPA-0: A 5G NPU With Integrated TM and CPU for Access Applications
Jim Scott, EZchip

Balancing Multicore Processors and Offloads
Majid Bemanian, AppliedMicro

Enabling Flexible Data-Plane Processing with the TILEGx Many-Core Processor
Bob Doud, Tilera

Q&A panel discussion featuring speakers of this session and Doron Tal, BroadLight

5.9 MB

Session 5: Software-Defined Networking

Software-Defined Networking
Christos Kolias, Orange

1.7 MB

Session 6: Secure System Design and Virtualization

Virtualization-Based Embedded-System Security
Ranganathan “Suds” Sudhakar, MIPS

Multicore Domain Protection–Resource Virtualization and Isolation
Satish Sathe, AppliedMicro

Challenges of Multi-Gigabit Security Protocol Acceleration in Modern SoCs
Steve Singer, AuthenTec

Q&A panel discussion featuring speakers of this session and Andre Hassan - Kilopass
5.9 MB

Session 7: 100Gbps Networking

Flow Processor Architectures for 100Gbps Open Flow and Next-Gen Firewall Designs
Niel Viljoen, Netronome

Bringing It All Together: Deep Packet Processing at 100G
Mike Coward, Radisys

Q&A panel discussion featuring speakers of this session and Per Lembre - Xelerate

2.9 MB

Session 8: Processor Design

Introduction to the e6500 Core
John Arends, Freescale

Heterogeneous Multicore Designs Using a Standard ISA
Kumaran Siva, ARM

Advances in Reconfigurable Processing Platforms
Dan Isaacs, Xilinx

6.7 MB

Session 9: Memory and Memory Alternatives

A Search Processor for Deterministic Forwarding and Classification
Rajneesh Gaur, Cavium

Alleviating the Burden of Gathering Network Statistics
Michael Miller, MoSys

Extending Technology Leadership with Advanced Hybrid Knowledge-based Processors
Rajagopal Krishnaswamy, NetLogic Microsystems

Q&A panel discussion featuring speakers of this session and David Chapman - GSI Technologies

3.9 MB


» Events  |  Event Info  |  Agenda Day One  |  Agenda Day Two