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September 20, 2021

• Tesla D1 Tackles AI Training
  In a surprising move, Tesla has developed its own AI training accelerator. The D1 design crams 25 chips into an enormous wafer-scale package that generates an industry-leading 9 petaflop/s.
  

• Cerebras Performs Extreme Training
  The company hopes to meet the demands of huge neural networks by offering its new MemoryX and SwarmX systems, which aim to reduce GPT-3 training time to less than one day.
  

September 13, 2021

• Sapphire Rapids Spans Tiles
  The next-generation Xeon processor is Intel’s biggest leap forward in years, delivering greater core counts, more per-core performance, integrated accelerators, and the latest memory and I/O interfaces.
  

• Alder Lake Extends Battery Life
  Alder Lake is Intel’s first mainstream PC processor with a hybrid architecture, combining big and small cores to increase both performance and battery life.
  

• Mount Evans Puts Intel in DPU Range
  The company recently disclosed architectural details of its first data-processing unit, combining a control plane and a programmable data plane to handle Ethernet speeds up to 200Gbps.
  

September 6, 2021

• Intel Stacks Tiles on Ponte Vecchio
  The new high-performance GPU is an engineering marvel, using Intel’s EMIB and Foveros technologies to create a heterogeneous processor combining 47 discrete die (tiles) built in five different process nodes.
  

• Golden Cove Adds Matrix Units
  Intel’s new flagship CPU microarchitecture delivers a big performance boost for general-purpose code while AI operations increase 8x using the new Advanced Matrix Extensions (AMX).
  

• Gracemont Bulks Up in Performance
  Intel’s family of “little” CPUs hits a bold new performance level by doubling the execution width and making other changes, offering a 20% jump in per-clock performance over its predecessor.
  

August 30, 2021

• Telum Adds AI Accelerator to IBM Z
  IBM’s new Z-series mainframe processor sets an industry record with more than 512MB of on-die memory and is the first high-end processor to ship with an integrated deep-learning accelerator (DLA).
  

• AI-Camera Chips Sharpen Surveillance
  Ambarella is sampling the CV5S and CV52S, which support 8K and 6K resolution, respectively. Realtek’s RT3916N handles 5 megapixels at 30fps, targeting lower-cost smart-camera systems.
  

• ArchiTek Offers Virtual Engines
  A Japanese startup has developed a configurable architecture that uses multiple fixed-function engines to increase power efficiency for a broad range of workloads in AI-based edge systems.
  

August 23, 2021

• Chipmakers Boost AI Efficiency by 5x
  As wafer costs rise sharply, chip designers are working to boost area efficiency and performance. Our analysis of the newest flagship smartphone processors reveals that efficiency increased by up to 5x from generation to generation.
  

• Renesas R-Car Drives Digital Cockpits
  The R-Car Gen3e line offers new cost-saving configurations along with performance and functional-safety improvements for digital-instrument clusters and infotainment systems in entry-level and midrange vehicles.
  

• Marvell Adds Innovium Cloud Switches
  Hot on the heels of closing its Inphi acquisition, Marvell announced an agreement to buy switch-chip startup Innovium. The deal will give it a leading position in data-center switching.
  

August 16, 2021

• Mali-G78 Catches Up to Apple GPU
  Apple’s new A14 GPU is blurring the line between PC and mobile performance, but the design offers less of a performance increase than previous generations, allowing competitors to regain ground.
  

• PsiQuantum Develops Optical Qubits
  A new startup is using a different approach in hopes of building the first quantum computer that can run for millions of cycles, enough to solve real-world problems, but it faces many challenges.
  

• Unisantis Memory Mixes DRAM, Flash
  The company has revealed details of its unique DRAM/flash hybrid memory technology, along with ambitious plans to overturn the global memory market.
  

August 9, 2021

• Intel Extends Process Roadmap to 20A
  The company unveiled an ambitious plan to regain the fab-technology lead by 2025 with a rapid-fire series of renumbered process nodes that include its first with gate-all-around (GAA) transistors.
  

• Edged.AI Offers Low-Latency IP
  A new startup offers deep-learning-accelerator intellectual property (IP) for high-performance edge SoCs aimed at autonomous systems that require low-latency inference.
  

• Editorial: Same Transistors, New Names
  IC-process names have become disconnected from transistor size and other physical parameters, leading Intel to abandon nanometers. These marketing names disguise the lack of progress in shrinking transistors.
  

August 2, 2021

• DXOmark Measures Phone Cameras
  Smartphone reviewers often quote DXOmark ratings. Little wonder, because the testing is rigorous and thorough. Here’s how DXOmark evaluates phone cameras—and why critics fault the scores.
  

• MLPerf Gets Tiny
  The newest AI benchmark from MLCommons targets microcontrollers and ultra-low-power accelerators for smartphones, smart speakers, doorbell cameras, and similar edge systems.
  

July 26, 2021

• Die Photos Show Cortex-A78 Shortfall
  Arm’s new CPUs were supposed to bring new efficiencies to smartphone processors, but initial implementations of Cortex-X1 and Cortex-A78 are larger than expected, reducing area efficiency.
  

• Editorial: Huawei Builds New Supply Chain
  To combat US sanctions, Huawei is attempting to build an entirely Chinese supply chain by investing in local companies and constructing its own fab. Fully escaping the sanctions, however, will be difficult.
  

July 19, 2021

• Training Competitors Battle on MLPerf
  The latest benchmark scores for AI training show that three challengers—Graphcore’s GC200, Habana’s Gaudi, and Huawei’s Ascend—are making progress but still lag Nvidia’s A100 and Google’s TPUv4.
  

• Cadence Floats K-Series DSPs
  The new Tensilica KP1, KP6, KQ7, and KQ8 DSPs are optimized for floating-point workloads, offering up to a 40% area reduction and 30% energy savings relative to previous Tensilica DSPs.
  

• Qualcomm Targets 5G Embedded
  The four new embedded products target industrial tablets, drones, point-of-sale terminals, kiosks, and similar applications, particularly those that can take advantage of its integrated 5G modem.
  

July 12, 2021

• Marvell Adds Vectors to Octeon 10
  The company’s newest data-processing unit (DPU) adds vector packet processing and an AI engine. Marvell expects to sample the first Octeon 10 processors later this year, targeting edge and cloud networking.
  

• NXP S32R Handles Automotive Radar
  The new chips address the entire range of automotive-radar applications from ADAS to self-driving cars. They include the S32R294 microcontroller, S32R45 imaging-radar processor, and TEF82xx transceivers.
  

• ProteanTecs Aids in Manufacturing
  Startup ProteanTecs licenses its Universal Chip Telemetry platform, which combines AI models and a collection of sensors, to reduce chip defect rates by 10x and to cut manufacturing costs.
  

July 5, 2021

• P550 Doubles Floating-Point Capability
  After picking up new customers Renesas and Tenstorrent, SiFive released two new CPU cores: the P270 and P550. These offerings sit atop the product stack, targeting Linux-based application processors.
  

• Data Centers Drive to 800Gbps Optics
  At the recent Optical Fiber Communication Conference (OFC), Broadcom, Marvell, and MaxLinear announced 112Gbps PAM4 physical-layer chips, including the first built in 5nm technology.
  

• Quadric’s Flexible Edge Accelerator
  Startup Quadric is now sampling its first chip, a data-flow processor that can handle a range of tasks from signal processing to AI. The 256-core design consumes less than 4W and targets edge applications.
  

June 28, 2021

• FinFET Roadmap Ends at 3nm
  The FinFET has enjoyed a good 10-year run, but the next process node will likely be its last. At 3nm, TSMC will stick with FinFETs, but Samsung plans to switch to next-generation nanosheet transistors.
  

• New AI Engines Give Versal an Edge
  Xilinx introduced the AI Edge line for automotive and industrial applications. An updated AI Engine doubles compute capacity relative to the previous generation.
  

• CertusPro-NX Delivers 10G Serdes
  Continuing to extend its Nexus family, Lattice is again taking advantage of fully depleted silicon-on-insulator (FD-SOI) technology to challenge Intel and Xilinx in low-density FPGAs.
  

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