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Agilex Moves to SuperFin
Intel’s initial 10nm FPGAs are now slated to reach general availability in Q3 after a delay owing to a redesign to the 10nm SuperFin process, which offers a dramatic reduction in power.
Arm Extends Valhall to Low-End GPUs
Arm’s third-generation Valhall GPUs boosts performance across all Mali product tiers. The Mali-G310 is the company’s first new entry-level design in three years, succeeding the Bifrost-based Mali-G31.
MLPerf 1.0 Adds Power Measurements
Nvidia dominated the latest round of MLPerf Inference submissions, but Qualcomm’s Cloud AI delivered leading performance per watt on two of the six neural networks. Many other vendors were absent.
Arm NI-700 Puts a NoC in CoreLink
To support its new Arm v9 CPUs, the company has developed a new dynamic shared unit and two new CoreLink interconnect products, the CI-700 cache-coherent interconnect and the NI-700 network-on-a-chip.
Arm v9 Yields Three New CPUs
In a company first, Arm released three CPUs at once, prompted by its transition to Arm v9. They include Cortex-X2, Cortex-A710, and Cortex-A510, the company’s first new “little” core in four years.
Dimensity 900 Jumps to Cortex-A78
MediaTek has refreshed its Dimensity 800 family with the latest CPU and GPU cores as well as new standards such as Wi-Fi 6 and LPDDR5 to enhance performance in midrange 5G smartphones.
IBM Test Chip Is First at 2nm
IBM has manufactured the industry’s first test chip in 2nm technology. Compared with 7nm FinFETs, the gate-all-around (GAA) transistors allow 3.4x the density with 45% greater speed or 75% less power.
Lattice Sets Midrange FPGA Collision
Known for tiny low-power FPGAs, Lattice is developing a new family called Avant that will target the midrange segment. It expects to introduce the first Avant devices late next year.
Unisoc T760 Launches Tanggula
Under its mountainous moniker Tanggula, Chinese vendor Unisoc plans to deliver four new 5G –chip families to revitalize its smartphone lineup. The first new product is a midrange chip called the T760.
Allwinner Creates First RISC-V AP
Using a CPU licensed from Alibaba, Allwinner’s D1 is the industry’s first RISC-V application processor. Featuring a GPU, DSP, and audio/video codec, it is available in a $13 development board.
Nvidia Orin Turbocharges ADAS
Nvidia’s Orin chip delivers a big performance and power-efficiency boost compared with previous Drive Xavier systems. But the next-generation Atlan will raise the bar even higher—to 1,000 TOPS.
Cadence Q8 Expands Vision DSPs
Cadence’s new Tensilica Vision DSPs extend its intellectual-property (IP) lineup at the high end to target 3D computer vision and at the low end to reduce area and power in always-on smart sensors.
SiFive 21G1 Update Boosts Hash Rates
The intellectual-property (IP) company announced a new AI platform that uses the Intelligence extensions to reduce convolution-processing time by 4x compared with a standard RISC-V vector implementation.
Movellus Improves Clock Meshes
The startup’s Maestro intellectual property (IP) enhances clocking efficiency by up to 30%, boosting chip performance and saving power. The “virtual mesh” also accelerates timing closure by 5x.
Neoverse V1 Updates Cortex-X1
Arm’s new Neoverse V1 and Neoverse N2 cores boost performance and add new instructions relative to the older Neoverse N1, but they still fall short of the leading x86 CPUs in single-thread performance.
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