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Andes Offers Low-Power CPU Cores

April 23, 2013

Author: Linley Gwennap

How can a CPU company ship 200 million units with hardly anyone knowing about it? Andes Technology has done just that, mainly by hiding its CPU core inside Bluetooth and other chips that go into high-volume cell phones. The company has developed a line of low-power CPU cores that is suited to a range of SoC applications. But few people outside of its native Taiwan have heard of the company.

Aiming to change this situation, Andes president Frankwell Lin appeared at the recent Linley Tech Mobile Conference as part of the company’s U.S. debut. Lin introduced the audience to his company and its line of AndesCore CPUs while announcing a new member of the family: the N705. Andes licenses all of its CPU designs as IP cores and has license agreements with more than 50 different companies.

Instead of using a standard instruction set such as ARM or MIPS, Andes created its own instruction-set architecture it calls AndeStar, a simple RISC-style design. Because the company currently targets low-end applications such as wireless, memory, and I/O controllers, its cores are simple scalar designs. They compete against low-end ARM CPUs ranging from Cortex-M0+ to Cortex-A5 but consume less power and die area.

In just a few years, Andes has developed a portfolio of low-end 32-bit CPU cores that satisfies a broad range of applications, including opportunities in mobile, digital home, industrial, and automotive designs. Because of their proprietary instruction set, these cores are not well suited to serve as the main application CPU in a smartphone or tablet, but they are easily deployable in any embedded application in which the code can be recompiled. These applications include many high-volume mobile sockets, such as cellular baseband, Wi-Fi and Bluetooth, touchscreen controllers, and power management.

Subscribers can view the full article in the Microprocessor Report.

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