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Nvidia’s Volta Upgrades HPC, Training

June 13, 2017

Author: David Kanter

Nvidia’s next-generation GPU architecture, Volta, extends the current Pascal architecture with greater performance, particularly for fast-growing data-center workloads such as high-performance computing (HPC) and neural-network training. The company redesigned Volta with compiled general-purpose code in mind. The cores are repartitioned to sustain high utilization, and the L1 cache is much more powerful than in prior generations. Nvidia also added a new mode that enables independent thread scheduling, giving programmers more flexibility. Volta is the first GPU to incorporate fixed-function hardware for machine learning, boosting mixed-precision flop/s by 6–12x.

The Tesla V100, which targets the data center, is the first chip to implement the Volta architecture. To simplify upgrades, the V100 is socket compatible with the Pascal-based P100 and fits in the same 300W thermal envelope. As the V100 will enter production in 3Q17, Nvidia opted for a custom 12nm FinFET process that’s modestly denser than 16nm, rather than TSMC’s less mature 10nm node. To maximize performance, it designed the largest logic chip possible: an 815mm2 behemoth that will be challenging to manufacture in volume.

Using the greater transistor count, the V100 packs 80 Volta cores. To improve yield, the die adds four redundant cores that can replace any defective ones. The final operating frequency range has not been determined but should be between 1.300GHz and 1.455GHz. The overall result is 7.4Tflop/s of peak double-precision performance and up to 119Tflop/s using the new matrix-multiply units. For HPC, the V100 offers 20% more memory bandwidth and 50% more flop/s than its predecessor.

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