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Xavier Simplifies Self-Driving Cars

June 20, 2017

Author: Mike Demler

Nvidia’s next-generation Xavier processor is the first chip to integrate all the compute cores that a complete Level 4/5 autonomous-driving system needs. The new chip will power its third-generation Drive PX system for self-driving cars. The company plans to sample Xavier by 4Q17.

Nvidia plans to sample Xavier by the end of this year. The new product replaces up to four separate chips that power the Drive PX 2—two Parker processors and two discrete Pascal GPUs. This combination enables the system to handle Level 4 and Level 5 autonomous driving. The new SoC includes upgrades to the CPU and GPU, along with a new core dedicated to neural-network inferencing; the company calls this core a deep-learning accelerator (DLA).

Whereas Parker integrates a CPU complex that comprises two of Nvidia’s custom 64-bit ARMv8-A CPUs coupled with quad Cortex-A57s, the new chip sports a completely custom eight-CPU configuration. The Xavier GPU uses the new Volta architecture, which adds matrix-multiplication units that accelerate deep-learning calculations.

Nvidia specifies Xavier to deliver a total of 30 trillion operations per second (TOPS) for deep learning while consuming 30W. By comparison, the four-chip Drive PX 2 system generates up to 20 TOPS. The PX 2 performs all of its calculations in floating point, however, whereas the new DLA is optimized for integer computation. To achieve this performance boost, the new Xavier design is a massive seven-billion-transistor chip that upgrades each of Parker’s processor cores. The company plans to manufacture it in TSMC’s custom 12nm FFN process, which it is also using for Volta.

Subscribers can view the full article in the Microprocessor Report.

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