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Nvidia Xavier Drives to Carmel

February 20, 2018

Author: Mike Demler

Nvidia has received the first working silicon of Xavier, its next-generation autonomous-driving SoC. The 350mm2 die integrates nine billion transistors and includes eight of the company’s new Carmel CPUs, a Volta GPU, two deep-learning accelerators (DLAs), and a programmable vision accelerator (PVA). Nvidia first disclosed in 3Q16 development of the 12nm chip, but in January, it demonstrated the first working samples from a TSMC process. It plans to begin sampling Xavier to its lead automotive customers this quarter and to enter full production by the end of 2018. This new schedule is a one-quarter slip from the original plan, but it remains at least three quarters ahead of Intel/Mobileye’s next-generation system.

Xavier targets Level 3 and Level 4 self-driving cars. It offers performance and power-efficiency upgrades compared with the current Drive PX2 system, which uses one or two 16nm Parker processors connected to one or two discrete Pascal GPUs Whereas a four-chip Drive PX2 system delivers a maximum 24 trillion operations per second (TOPS) and consumes up to 250W, a single-chip Drive Xavier system delivers 30 TOPS and consumes just 30W.

The company originally positioned Xavier for fully autonomous Level 5, but developers of robo-taxis (likely the first Level 5 vehicles) are demanding even greater performance. To meet that demand, Nvidia is building a new four-chip system, called Pegasus, comprising two Xavier processors and two next-generation GPU chips it has yet to name. Pegasus will deliver 320 TOPS, according to the company, but it increases system power consumption to 400W. To allow customers to choose the power/performance that suits their needs, we expect Nvidia to offer Pegasus systems in a range of configurations, such as dual Xavier chips with one discrete GPU or even none.

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