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Esperanto Maxes Out RISC-V

December 11, 2018

Author: Linley Gwennap

Esperanto is a startup combining the two hottest processor technologies: AI acceleration and RISC-V. This business plan, along with an all-star engineering team led by CEO and RISC pioneer Dave Ditzel, helped the company close a recent Series B round of $58 million—enough to bring its first processor to market. Esperanto completed the RTL for this product in September, so we expect samples to arrive in 2H19 followed by production around mid-2020. Given the long lead time, the company is withholding details, but it began the unwrapping process by disclosing the microarchitecture of its ET-Maxion CPU.

The new processor chip actually includes two different RISC-V CPU designs. ET-Maxion is a high-performance out-of-order (OOO) microarchitecture for general-purpose code. ET-Minion is a smaller AI-focused core that includes a set of proprietary vector extensions. (The RISC-V vector committee has yet to approve an official version.) The processor will run Linux and other high-level software on the Maxion cores while delegating AI-intensive workloads to the Minions.

The company expects Maxion to deliver strong performance while maintaining excellent power efficiency. To achieve this performance, the CPU can decode four instructions per cycle and issue them to five execution units in the OOO core. It implements the base RV64GC instruction set, a common denominator among current 64-bit RISC-V designs. Using a 10-stage pipeline, Maxion targets a relatively modest 2.0GHz clock speed in 7nm technology, boosting power efficiency. It should considerably outperform any other announced RISC-V CPU.

Initially, Esperanto plans to sell its processor on accelerator cards for data centers and other customers with large AI workloads. But given that Maxion is the most powerful RISC-V CPU design yet revealed, several companies—including Western Digital, an Esperanto investor—have inquired about licensing it for other applications.

Subscribers can view the full article in the Microprocessor Report.

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