» Current | 2020 | 2019 | 2018 | Subscribe

Linley Newsletter

CXL Enters Coherent-Accelerator War

July 23, 2019

Author: Bob Wheeler

It feels like déjà vu all over again. Servers need an open cache-coherent interconnect between the CPU and accelerators such as GPUs, FPGAs, and ASICs. But after CCIX and OpenCAPI, do customers need a third choice? The answer may be yes because the first two lacked Intel’s support. But now, the leading server-processor vendor has announced Compute Express Link (CXL) backed by a consortium that includes four leading cloud-service providers and four leading server OEMs. CXL Specification 1.0 is already available, even though the CXL Consortium has yet to incorporate. Thus, Intel has donated a fully baked specification to the still-forming group.

CXL is built on PCI Express (PCIe) 5.0 physical layer and transport protocol. A server with a CXL-enabled host processor (e.g., a future Intel Xeon) can have dual-mode slots that handle either standard PCIe or CXL add-in cards. At the PCIe Gen5 rate of 32GT/s, a x16 slot yields 64GB/s of full-duplex CXL bandwidth. The standard defines three protocols, with the mandatory I/O protocol simply duplicating PCIe functions. The cache protocol enables a device to cache data from host memory. Finally, the memory protocol allows the host to access memory attached to the device, which is typically an accelerator but could also be a memory controller.

Notably absent from the list of CXL “founding promoters” is any chip vendor besides Intel, although AMD and others have joined as members. In the past, Intel tightly controlled its coherent processor interconnects—QPI and UPI—forc­ing competitors to develop alternatives. AMD has backed CCIX, IBM is backing OpenCAPI, and some accelerator vendors are backing both specifications, but few shipping products implement them. Since important customers are lining up behind CXL, accelerator vendors must now re­spond. Given the significant differences between the com­peting interconnects, only an FPGA vendor such as Xilinx can afford to be agnostic. Other chip vendors will have to pick their camp, and Xeon’s dominance will create huge pull for CXL.

Subscribers can view the full article in the Microprocessor Report.

Subscribe to the Microprocessor Report and always get the full story!

Purchase the full article

Events

Linley Spring Processor Conference 2020
Coming April 7-8, 2020
Hyatt Regency, Santa Clara, CA
Register Now!
Linley Fall Processor Conference 2020
Coming October 28-29, 2020
Hyatt Regency, Santa Clara, CA
More Events »

Newsletter

Linley Newsletter
Analysis of new developments in microprocessors and other semiconductor products
Subscribe to our Newsletter »