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Power9 AIO Boosts DRAM Bandwidth

September 24, 2019

Author: Tom R. Halfhill

IBM’s newest Power9 processor introduces a high-bandwidth DRAM interface and improved OpenCAPI 4.0 protocol while retaining the family’s other stellar features. The Power9 AIO (Advanced I/O) offers the industry’s highest memory bandwidth, outdoing Intel’s latest Xeon Platinum chips and AMD’s new Epyc 7002 chips. It’s scheduled to begin production late next year and foreshadows some features destined for Power10. IBM unveiled the Power9 AIO at the recent Hot Chips conference.

The Power9 AIO will be the last member of a generation that started production in 2017. For the most part, it resembles previous 24-core Power9 chips that employ the quad-thread SMT4 CPU core. What’s new is a different I/O ring surrounding the cores and caches. Among other things, it implements a new Open Memory Interface (OMI) for special DIMMs that integrate a memory controller alongside standard DRAMs.

Microchip designed the new controller, and the OMI DIMMs are available from Micron, Samsung, and Smart Modular. Because OMI is open, any processor vendor can adopt it and use the same DIMMs. In practice, broad adoption is unlikely. Their special controllers and low volumes will make them more expensive than standard DIMMs. But they give IBM a huge memory-bandwidth advantage that reaches 650GB/s—at least 3x more than similar processors offer today. Although the initial OMI DIMMs are limited to 410GB/s, the Power9 AIO still delivers at least 2x more bandwidth than the current competition. It’s well suited to memory-intensive workloads such as large databases, big-data analytics, and high-performance computing (HPC).

IBM uses Power processors in its own servers and sells them to other customers, such as system vendor Wistron and the U.S. government. To further promote the ecosystem, IBM recently opened the instruction-set architecture as a royalty-free ISA, released a royalty-free soft core, and announced that the OpenPower Foundation is joining the Linux Foundation.

Subscribers can view the full article in the Microprocessor Report.

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