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Prepare for Copackaged Optics

October 1, 2019

Author: Bob Wheeler

Electrical-I/O pin bandwidths are almost out of runway, and switch chips will be first to hit the serdes wall. As bandwidth demand continues to rise, chips are running out of pins, and they’re hitting thermal limits. High-speed serial interfaces, using serdes-based transceivers, scaled relatively easily to 28Gbps per pin. Pushing pin bandwidth beyond that point, however, requires new modulation schemes or higher frequencies. As frequency increases, so does insertion loss, limiting signal reach across high-volume PCB material.

An alternative that can improve signal integrity by shortening trace length is on-board optics, which moves the optics closer to the switch chip and uses optical fiber to the front panel. This approach has some advantages over traditional pluggable optics, but it’s unlikely to enable another doubling of serdes rates.

Greatly improving the electrical channel requires moving the optics into the chip package—specifically, a multichip module (MCM) with copackaged optics. Such a change disrupts existing package and test flows, but at least 2.5D packaging is proven in high volume. Copackaged-optics customers will shift from U.S.-government programs that act as low-volume technology incubators to hyperscale-data-center operators that require leading-edge switches in high volume. Bridging the gap from the former to the latter will take time, investment, and new ecosystem partnerships.

Subscribers can view the full article in the Microprocessor Report.

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