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SiFive Secures RISC-V

November 12, 2019

Author: Bob Wheeler

Security features are now table stakes for microcontrollers, but RISC-V has too few chips to play. At the recent Linley Fall Processor Conference, SiFive disclosed its secure-platform architecture, which includes hardware and software as well as provisioning services. The company announced specific features available now across its core line, and it disclosed a roadmap for additional capabilities, most of which it plans to release in 2020. The SiFive Shield umbrella brand encompasses hardware root of trust, cryptographic intellectual property (IP), and memory-protection features, as well as software drivers and secure-monitor code.

To build a root of trust for secure boot and debug, Shield offers unique-ID and key storage, a true-random-number generator (TRNG), key and certificate provisioning, secure-boot code, firmware-signing tools, and secure debug. Cryptographic (crypto) IP includes AES block ciphers, SHA-2 and SHA-3 hash algorithms, and RSA and elliptic-curve public-key algorithms. The other major Shield component is WorldGuard, which SiFive should roll out next year. Like Arm’s TrustZone, WorldGuard creates a trusted execution environment by isolating resources. (Arm and SiFive call security domains “worlds.”) It isolates caches, memories, DMA channels, and peripherals by domain using a world ID.

Shield’s baseline capabilities are similar to those of Arm’s TrustZone, but SiFive is adding features and services unavailable from that competitor. Shield and WorldGuard plug a hole in its story, but it’s unclear how much of the technology will proliferate through the RISC-V ecosystem. For now, the security roadmap keeps the company at the forefront for commercial applications of the open ISA.

Subscribers can view the full article in the Microprocessor Report.

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