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Arm Offers Bespoke Cortex-M CPUs

November 19, 2019

Author: Mike Demler

For the first time, Arm is opening one of its CPU architectures to allow custom instructions, giving licensees the flexibility that other intellectual-property (IP) vendors have offered for many years. It will initially implement the new feature in Cortex-M33, but all future Arm v8-M cores will support this option as well. In 1H20, the company plans to offer the feature at no additional cost to new and existing M33 licensees.

Like other customizable CPUs, the Arm v8-M custom instructions target chip vendors seeking to differentiate their products with proprietary accelerators, as well as those requiring application-specific optimizations. Cortex-M33 already has an interface to which designers can attach up to eight custom accelerators (CP0–CP7), but that technique runs the new instructions in a loosely coupled unit rather than in the existing CPU pipeline.

For the new custom-instruction feature, the company repurposed the coprocessor’s ISA-encoding space to enable integration of accelerators directly into the CPU, allowing programs to interleave new instructions with the standard Cortex-M instructions. Custom instructions run in a custom module inside the core with a predefined instruction space, and they use the standard architectural registers and flags, including floating-point/SIMD registers as well as the M-profile vector extensions.

Companies planning to use the custom-instruction feature include NXP, Silicon Labs, and STMicroelectronics. Although Arm was late to offer customizable MCUs, its architectures dominate the market. The new capability gives licensees one less reason to explore alternatives, and their customers will benefit from the application-specific performance and power optimizations, as well as code-size reductions. 

Subscribers can view the full article in the Microprocessor Report.

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