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Intel Extends 3D Packaging With ODI

January 21, 2020

Author: David Kanter

Many demanding semiconductor applications, such as deep-learning accelerators (DLAs), have adopted advanced packaging to boost performance and compensate for the slowdown in CMOS scaling. Silicon interposers have become a common technique for connecting compute logic with High Bandwidth Memory (HBM) or high-speed I/O and for dividing compute logic across multiple die. But even using Intel’s EMIB technology, this 2.5D approach adds cost and is limited to expensive low-volume products.

The company more recently deployed Foveros, its first 3D-integration technology, in the Lakefield PC processor. By stacking die, Foveros increases board density, but it places many restrictions on the die arrangement and, like EMIB, adds cost. Addressing these concerns, Intel’s new Omni-Directional Interconnect (ODI) is a sophisticated family of package interconnects and assembly flows for 3D integration. It builds on EMIB and Foveros to improve performance, capabilities, and flexibility, with costs potentially similar to those of the 2.5D EMIB, making it a more compelling proposition for high-performance products. ODI’s high-density data connections and enhanced power delivery free up silicon area for logic and allow more-flexible cooling relative to standard silicon interposers.

ODI comes in two flavors: a package-cavity flow that blends packaging and multidie attachment, and a copper-pillar process that first assembles multiple die and then packages the assembly. As the name implies, ODI is designed for flexibility; it supports lateral data, vertical data, and vertical power connections, and it can connect fully overlapped as well as partially overlapped active-die stacks. The copper pillars can create vertical power connections that bypass the silicon, shrinking interposers and improving signal transmission.

Although Intel has yet to disclose products that employ ODI, it has a wide range of candidates for 2022 and beyond, including GPUs, FPGAs, networking devices, and DLAs. Given sufficient yield and volume, it could also use ODI for successors to Lakefield.

Subscribers can view the full article in the Microprocessor Report.

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