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TI Auto Gateway Manages Traffic Flow

February 25, 2020

Author: Mike Demler

Increased adoption of advanced driver-assistance systems (ADASs) and in-vehicle infotainment (IVI) has transformed automotive networks into complex multidomain architectures. To simplify the integration of these new compute subsystems with traditional electronic control units (ECUs), Texas Instruments developed the Jacinto DRA829V processor, which serves as an automotive gateway as well as the head-unit traffic manager for digital cockpits.

The design integrates four processor subsystems operating in three isolated domains: the primary domain manages most digital-cockpit and system interfaces, the MCU domain handles ASIL D functional safety, and a Cortex-M3 in the wake-up domain handles low-power modes and secure boot. In the two main processor subsystems, applications run on two Cortex-A72 CPUs, but timing-critical tasks run on four Cortex-R5F CPUs. The MCU subsystem is an isolated safety island that complies with ISO 26262 Freedom From Interference (FFI) requirements. It integrates two Cortex-R5F CPUs; both have the same cache configuration and clock frequency as the main cores, but they support split-lock operation for ASIL C/D compliance.

The Jacinto DRA829V is a multifaceted traffic manager for all the data flowing through a vehicle’s heterogeneous compute domains. It can connect to ADASs, digital cockpits, and streaming media as well as safety-critical ECUs, offering a complete hub for today’s software-defined automobiles. The chip can connect to as many as 16 CAN-FD buses, and it provides switches for eight Gigabit Ethernet ports and four PCIe Gen3 interfaces. The company manufactures it in 16nm technology and is now offering samples. In 1,000-unit quantities, the DRA829V sells for $97. TI plans to start high-volume production in 2H20.

Subscribers can view the full article in the Microprocessor Report.

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