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Ceva XC16 Stays Ahead of 5G Rollout

March 24, 2020

Author: Mike Demler

The XC16 DSP is the first product to implement Ceva’s fourth-generation XC architecture, which includes a new dynamically configurable multicore/multithread feature. The design comprises two eight-way VLIW cores—scalar processors (SPs), in the company’s parlance—along with four vector compute units (VCUs). During run time, it allows software to configure the SPs and VCUs as two symmetric dual-vector (DV) processors or allocate all four VCUs to one SP to form a quad-vector (QV) processor, with the second SP handling control operations.

The XC16 builds on technology Ceva developed in the previous-generation XC12 DSP as well as the X4 baseband controller it unveiled in 2016. Architectural improvements enable the new design to deliver up to 2.5x the performance of its predecessor. The company optimized the XC16 for 5G clients as well as new cellular-network topologies, including the telecom industry’s OpenRAN (Open Radio Access Network) initiative, which aims to build vendor-neutral systems based on software-defined technology. Software configurability is a hallmark of Ceva DSPs. The underlying XC architecture can also serve in AI, lidar/radar signal processing, and Wi-Fi access points.

Because the 3GPP takes years to develop each new release of its cellular-network standards, intellectual-property (IP) vendors must create new cores while specifications are in development. Ceva designed the XC16 to be software configurable for the Release 16 specification (also called 5G Phase 2), which the 3GPP expects to freeze in 2Q20, as well as Release 17, which is in planning for 4Q21. It worked with a lead customer to develop the XC16 and intends to offer it for general licensing in 2Q20. Nokia and ZTE use the earlier designs, and Ceva claims a third infrastructure customer as well, probably Ericsson. The first hardware based on the new IP will likely reach production in 1H21.

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