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Versal Premium Targets Core Networks

March 31, 2020

Author: Tom R. Halfhill

Xilinx recently announced new Versal FPGAs for the first time since unveiling the family in 2018. The new Versal Premium Series defines the high end, above the existing AI Core Series and Prime Series. It brings more configurable logic, more DSP blocks, and more high-speed Ethernet. New hard logic includes 600Gbps Ethernet and Interlaken controllers plus multiple 400Gbps cryptography engines and 32Gbps PCI Express Gen5 controllers. DSP integer performance surges to 99 trillion operations per second (TOPS), and 32-bit floating-point performance reaches 23 trillion operations per second (Tflop/s).

Xilinx designed the Premium Series mainly for core-network acceleration in broadband and 5G-cellular networks and for high-speed interconnects between hyperscale data centers. Its prodigious Ethernet bandwidth will enable 400–600Gbps optical links.

The company calls these chips adaptive compute acceleration platforms (ACAPs). They integrate more hard logic than traditional FPGAs and function like SoCs, capable of booting and running without first configuring the soft logic. They have dual Arm Cortex-A72 CPUs, dual Cortex-R5F real-time microcontroller cores, tightly coupled local memory, a proprietary network-on-a-chip (NoC), and hardened DRAM controllers.

Whereas initial Versal processors limit the FPGA fabric to 984,000 lookup tables (LUTs), the Premium Series enlarges it to as many as 3,400,000. And whereas the existing chips have at most 3,080 DSP blocks, the biggest Premium device has more than 14,000.

Xilinx will manufacture the Premium Series in the same TSMC 7nm FinFET technology it uses for the other Versal products. The first VP1xxx devices are scheduled to sample in 1H21, and we estimate volume production will start in 1H22. Their only direct competitors will be new FPGAs from Intel (the 10nm Agilex family) and Achronix (the 7nm Speedster7t family). Those rivals can’t match Versal Premium in most respects, but they’re scheduled to reach production about one year sooner.

Subscribers can view the full article in the Microprocessor Report.

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