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Graphcore Doubles IPU Performance

August 4, 2020

Author: Linley Gwennap

Well-funded startup Graphcore is now sampling its second-generation AI accelerator, delivering twice the peak performance and three times the memory capacity of its initial design. With its new Colossus Mk2 GC200 chip, which the company calls an IPU, Graphcore has once again set a record by cramming 60 billion transistors and almost a gigabyte of SRAM onto a single 7nm die. These changes double throughput for most neural networks and offer greater increases for models that take advantage of the larger memory, helping Graphcore keep pace with the improvements to Nvidia’s recent Ampere A100 GPU. But the GC200 chip also consumes a lot more power than the initial version.

The company offers the GC200 chip as part of its M2000 accelerator, a 1U blade that contains four of the new chips along with a single system-logic chip, sockets for up to 512GB of shared DRAM, and a slot for an Ethernet card (NIC). Customers can rack and stack up to 16 of the new boxes, using the chips’ proprietary IPU-Links to form a double-ring structure for data exchange. The networking card can pass data between racks to create even bigger rigs for rapid training of massive AI models. The M2000 boxes connect to an external server for host processing, allowing customers to choose the appropriate ratio of server performance to accelerator performance.

In February, Graphcore raised a $150 million Series D round at a $2.0 billion valuation, bringing its total funding to $450 million. We expect the M2000 to reach production in 4Q20; the unit has a $34,250 list price with four GC200 chips but no DRAM or NIC. Early customer applications include running proprietary financial models, interpreting medical images, and training autonomous vehicles (BMW invested in the Series D round).

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