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Ventana Develops RISC-V Chiplet

December 14, 2021

Author: Linley Gwennap

Combining two emerging trends, startup Ventana Micro Systems has built a chiplet that contains a cluster of high-performance RISC-V CPU cores. The design targets leading cloud-service providers and other companies that wish to develop high-performance data-center processors but don’t want to design their own CPUs. The chiplet approach, which leading processor vendors employ, allows these customers to develop a simpler chip that implements their desired combination of memory channels and I/O interfaces while offloading the complex CPU design. The startup plans to deliver production volumes of its 5nm chiplet in 2022.

Chiplet design is becoming more popular as leading-edge processors move to 5nm and beyond, as it allows memory and I/O functions to remain in less expensive manufacturing nodes. Current processors, however, exclusively combine chiplets from a single company, ensuring compatibility. One challenge for Ventana is that standards for third-party chiplets remain undefined. The company must also overcome resistance to new instruction sets among data-center customers, which typically rely on x86. But Ventana hopes to achieve first-mover advantage by delivering the industry’s highest-performance RISC-V cores using this new business model.

In 2008, CEO Balaji Baktha and chief architect Greg Favor founded Veloce Technologies, which developed the high-performance Arm CPU that appeared in three gen­er­ations of AppliedMicro X-Gene processors (see MPR 3/27/17, “X-Gene 3 Up and Running”). After Ampere Com­puting acquired X-Gene, the two founded Ventana in 2018. Favor, whose extensive experience includes architect­ing AMD x86 CPUs, now leads the RISC-V design team. The Silicon Valley startup has raised $53 million; Marvell founders Sehat Sutardja and Weili Dai led the most recent round. Baktha spent three years work­ing with Sutardja and Dai as a senior Marvell executive.

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